MAX9403 Maxim, MAX9403 Datasheet - Page 5

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MAX9403

Manufacturer Part Number
MAX9403
Description
The MAX9400/MAX9402/MAX9403/MAX9405 are extremely fast, low-skew quad LVECL/ECL or LVPECL/PECL buffer/receivers designed for high-speed data and clock driver applications
Manufacturer
Maxim
Datasheet
17, 24, 30
1, 8,11,
14, 20,
21, 27
PIN
10
12
13
15
16
18
19
22
23
25
26
28
29
31
32
2
3
4
5
6
7
9
NAME
OUT3
OUT3
OUT2
OUT2
OUT1
OUT1
OUT0
OUT0
V
CLK
CLK
SEL
SEL
V
IN3
IN3
IN2
IN2
IN1
IN1
IN0
IN0
EN
EN
EP
CC
EE
_______________________________________________________________________________________
Positive Supply Voltage. Bypass V
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
Noninverting Differential Select Input. Setting SEL = high and SEL = low (differential high) enables all four
channels to operate asynchronously. Setting SEL = low and SEL = high (differential low) enables all four
channels to operate in synchronous mode.
Inverting Differential Select Input
Noninverting Differential Clock Input
Inverting Differential Clock Input. A rising edge on CLK (and falling on CLK) transfers data from the inputs
to the outputs when SEL = low.
Noninverting Differential Output Enable Input. Setting EN = high and EN = low (differential high) enables
the outputs. Setting EN = low and EN = high (differential low) drives outputs low.
Inverting Differential Output Enable Input
Noninverting Differential Input 3
Inverting Differential Input 3
Inverting Differential Output 3
Noninverting Differential Output 3
Negative Supply Voltage
Noninverting Differential Input 2
Inverting Differential Input 2
Inverting Differential Output 2
Noninverting Differential Output 2
Noninverting Differential Output 1
Inverting Differential Output 1
Inverting Differential Input 1
Noninverting Differential Input 1
Noninverting Differential Output 0
Inverting Differential Output 0
Inverting Differential Input 0
Noninverting Differential Input 0
Exposed Paddle (MAX940_EGJ only). Connected to V
Quad Differential LVECL/LVPECL
CC
to V
EE
with 0.1µF and 0.01µF ceramic capacitors. Place the
FUNCTION
EE
internally. See package dimensions.
Buffer/Receivers
Pin Description
5

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