IR3500VMPBF International Rectifier, IR3500VMPBF Datasheet - Page 7

• Manufacturer Part Number: IR3500VMPBF
• Description: The IR3500V Control IC combined with one or more xPhase3 Phase IC implement the control and MOSFET driver functions for a VR11.1 CPU VTT power supply.
• Manufacturer: International Rectifier

Specifications of IR3500VMPBF

• Package: 32-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 250kHz to 1.5MHz
• Pbf: PbF Option Available

PIN DESCRIPTION
PIN#
1-8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
9
Page 7 of 34
PIN SYMBOL
ROSC/OVP
HOTSET
VOSEN+
CLKOUT
PHSOUT
ENABLE
VCCLFB
VOSEN-
VSETPT
VRHOT
EAOUT
OCSET
SS/DEL
VID7-0
PHSIN
VDRP
VDAC
LGND
VCCL
VO
FB
IIN
VID0, 1, 5, 7 are grounded. VID6 is pulled up. VID2~4 are inputs to VID D to A
converter.
Enable input. A logic low applied to this pin puts the IC into fault mode. Do not float
this pin as the logic state will be undefined.
Open collector output of the VRHOT comparator which drives low if HOTSET pin
voltage is lower than 1.6V. Connect external pull-up.
A resistor divider including thermistor senses the temperature, which is used for
VRHOT comparator.
Remote sense amplifier input. Connect to ground at the load.
Remote sense amplifier input. Connect to output at the load.
Remote sense amplifier output.
Inverting input to the error amplifier.
Output of the error amplifier.
Buffered IIN signal. Connect an external RC network to FB to program converter
output impedance.
Average current input from the phase IC(s). This pin is also used to communicate
over voltage condition to phase ICs.
Error amplifier non-inverting input. Converter output voltage can be decreased from
the VDAC voltage with an external resistor connected between VDAC and this pin
(there is an internal sink current at this pin).
Programs the constant converter output current limit and hiccup over-current
thresholds through an external resistor tied to VDAC and an internal current source
from this pin. Over-current protection can be disabled by connecting a resistor from
this pin to VDAC to program the threshold higher than the possible signal into the IIN
pin from the phase ICs but no greater than VCCL – 2V (do not float this pin as
improper operation will occur).
Regulated voltage programmed by the VID inputs. Connect an external RC network
to LGND to program dynamic VID slew rate and provide compensation for the
internal buffer amplifier.
Programs converter startup and over current protection delay timing. It is also used
to compensate the constant output current loop during soft start. Connect an
external capacitor to LGND to program.
Connect a resistor to LGND to program oscillator frequency and OCSET, VSETPT
and VDAC bias currents. Oscillator frequency equals switching frequency per phase.
The pin voltage is 0.6V during normal operation and higher than 1.6V if over-voltage
condition is detected.
Local Ground for internal circuitry and IC substrate connection.
Clock output at switching frequency multiplied by phase number. Connect to CLKIN
pins of phase ICs.
Phase clock output at switching frequency per phase. Connect to PHSIN pin of the
first phase IC.
Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
Output of the voltage regulator, and power input for clock oscillator circuitry. Connect
a decoupling capacitor to LGND.
Non-inverting input of the voltage regulator error amplifier. Output voltage of the
regulator is programmed by the resistor divider connected to VCCL.
PIN DESCRIPTION
July 28, 2008
IR3500V