TLE 8261E Infineon Technologies, TLE 8261E Datasheet - Page 49

• Manufacturer Part Number: TLE 8261E
• Manufacturer: Infineon Technologies

Specifications of TLE 8261E

• Packages: PG-DSO-36
• Transceiver: High Speed CAN ISO 11898 - 5
• Voltage Regulator Output: 2 x 200 mA + 400 mA
• Watchdog: Standard and Window Watchdog
• Quiescent Current (max.): 28 ?A (typ) Sleep Mode (5V on)
• Standby Current: 58 ?A (typ) Stop Mode (5V on)

11
11.1
The interrupt pin has a general purpose function to point out to the microcontroller either a wake up, a failure
condition or the switch on of a voltage regulator.
Figure 22
up event, overtemperature or overtemperature pre-warning as well as other failures. These events turn the INT
pin to active LOW. All interrupt sources can be masked via a SPI bit, then no interrupt is generated for this event.
For failures on under-voltage the interrupt is dual-sensitive. This means that an interrupt is generated when the
failure appears, as well as when the failure disappears. For failures on over-temperature, communication failures
and voltage regulator over current and undervoltage, the dedicated SPI interrupt bit indicated first the interrupt
source and then the state of the device. So, the bit is set to failure
the microcontroller reads the bit. For the SBC failure (Wrong WD Setting, Reset, Fail SPI) and wake events, the
INT indicates only an event and the bit is cleared with a dedicated SPI read.
The INT pin is released when an SPI read is done to Interrupt Register 000 with a “Read Only” command, or after
interrupt time out
000 and the bit is cleared. If it was an other interrupt source the bit INT is set, and interrupt register 001 and 010
need to be read. With a “Read Only“command the event triggered interrupt bits are cleared. The INT bit will be set
to “0” when all bits in interrupt register 001 and 010 are set to “0”. If an interrupt is masked (bit set to “0”) only the
interrupt does not occur, the interrupt bit in the SPI is shown.
Figure 22
set the configuration of the device to config 1/3 or config 2/4, see
Figure 22
Table 9
Interrupt sources
Temperature
Over temperature pre-warning V
Over temperature V
Over temperature HS CAN
Communication failure
CAN Failure
Voltage regulator
Data Sheet
gives the hardware set-up. The interrupt function is designed to inform the microcontroller of any wake-
shows a simplified diagram of the INT output. In Init Mode before RO goes high the INT pin is used to
Interrupt Function
Interrupt Description
Interrupt Block Diagram
Interrupt sources
t
INTTO
CC2
. If the interrupt cause was a wake event, the interrupt bit can be read in Interrupt Register
CC1µC
Interrupt logic
Table 9
49
shows the possible interrupt sources in the device, and
INT Activation
Rising
Rising
Rising
Rising
Time
out
1
Chapter
at the event, and remains latched at least until
INTERRUPT BLOCK.VSD
13.
R
SPI bit
OTP
OT
OT HSCAN
CAN Failure 1..0
CAN Bus
INT
INT
V
V
CC2
CC1µC
Rev. 1.0, 2009-03-31
Interrupt Function
TLE8261E
State
Event /
State
Event/
State