BTS 5590G Infineon Technologies, BTS 5590G Datasheet - Page 41

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BTS 5590G

Manufacturer Part Number
BTS 5590G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of BTS 5590G

Packages
PG-DSO-36
Channels
5.0
Channel Mix
2*25mohm+1*40mohm+2*100mohm
Led Mode
Yes
Cranking Mode
No
Pwm Engine Integrated
No
10.5
SI
SI
SI
SO
SO
1) The SO pin shows this information between CS hi -> lo and first SCLK lo -> hi transition.
Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame
Field
TER
ADDR
DATA
LHEN
WDL
ERRx
x = 4 to 0
Data Sheet
the output at SPI signal SO will contain the requested information. A new command can be executed in the
second frame.
CS
TER
TER
1)
Bits
CS
6:5
4:0
6
5
x
SPI Protocol
Write Register
Read Register
Read Standard Diagnosis
Standard Diagnosis
Second Frame of Read Command
Type Description
r
rw
rw
r
r
r
7
1
0
0
0
1
Transmission Error
0
1
Address
Pointer to register for read and write command
Data
Data written to or read from register selected by address ADDR
Limp Home Enable
0
1
Watchdog Lock
0
1
Diagnosis of Channel x
0
1
LHEN
Previous transmission was successful (modulo 8 clocks received)
Previous transmission failed or first transmission after reset
L-input signal at pin LHEN
H-input signal at pin LHEN
Watchdog can be served
Watchdog trigger state machine is locked
No failure
Over temperature, over load or short circuit
6
x
ADDR
ADDR
ADDR
WDL
5
x
41
ERR4
4
x
x
ERR3
3
x
x
Serial Peripheral Interface (SPI)
DATA
ERR2
DATA
2
x
x
SPOC - BTS5590G
Rev. 1.3, 2007-10-30
ERR1
1
x
x
ERR0
0
0
1

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