TLE 7259-2GU Infineon Technologies, TLE 7259-2GU Datasheet - Page 26

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TLE 7259-2GU

Manufacturer Part Number
TLE 7259-2GU
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 7259-2GU

Packages
PG-DSO-8
Transmission Ratemax
10.4 kbit/s
Quiescent Current (max.)
< 10 µA sleep mode
Bus Wake-up Capability
Yes
Additional Features
INH, EN, WK
Wake-up Inputs
Bus wake-up + wake-up pin
7.3
To achieve the required timings for the dominant to recessive transition of the bus signal an additional external
termination resistor of 1 kΩ is mandatory. It is recommended to place this resistor at the master node. To avoid
reverse currents from the bus line into the battery supply line it is recommended to place a diode in series with the
external pull-up. For small systems (low bus capacitance) the EMC performance of the system is supported by an
additional capacitor of at least 1 nF at the master node (see
Termination resistor and the bus capacitances influence the performance of the LIN network. They depend on the
number of nodes inside the LIN network and on the parasitic cable capacitance of the LIN bus wiring.
7.4
A capacitor of 10 µF at the supply voltage input
reverse polarity diode this prevents the device from a detecting power down conditions in case of negative
transients on the supply line (see
The 100 nF capacitor close to the
Data Sheet
Master Termination
External Capacitors
Figure 15
V
S
pin of the TLE7259-2GU is required to get the best EMC performance.
and
Figure
V
S
buffers the input voltage. In combination with the required
26
16).
Figure 15
and
Figure
16).The values for the Master
Application Information
Rev. 1.1, 2008-07-14
TLE7259-2GU

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