SAF-C161K-LM Infineon Technologies, SAF-C161K-LM Datasheet - Page 50

• Manufacturer Part Number: SAF-C161K-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161K-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.0 KByte
• Program Memory: 0.0 KByte

Multiplexed Bus (Reduced Supply Voltage Range) (cont’d)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
Data valid to WrCS
Data hold after RdCS
Data float after RdCS
Address hold after
RdCS, WrCS
Data hold after WrCS
1)
Data Sheet
These parameters refer to the latched chip select signals (CSxL). The early chip select signals (CSxE) are
specified together with the address and signal BHE (see figures below).
t
Symbol
t
t
t
t
t
A
50
51
52
54
56
+
t
CC 28 +
CC 30 +
CC 30 +
SR 0
SR –
C
+
t
F
min.
Max. CPU Clock
(150 ns at 20 MHz CPU clock without waitstates)
= 20 MHz
t
t
t
46
C
F
F
max.
–
–
30 +
–
–
t
F
1 / 2TCL = 1 to 20 MHz
min.
2TCL - 22
+
0
–
2TCL - 20
+
2TCL - 20
+
Variable CPU Clock
t
t
t
C
F
F
max.
–
–
2TCL - 20
+
–
–
t
F
V2.0, 2001-01
C161O
C161K
Unit
ns
ns
ns
ns
ns