SAF-C161K-LM Infineon Technologies, SAF-C161K-LM Datasheet - Page 55

• Manufacturer Part Number: SAF-C161K-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161K-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.0 KByte
• Program Memory: 0.0 KByte

AC Characteristics
Demultiplexed Bus (Standard Supply Voltage Range)
(Operating Conditions apply)
ALE cycle time = 4 TCL + 2
Parameter
ALE high time
Address setup to ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
RD, WR low time
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay
Data float after RD rising
edge (no RW-delay
Data Sheet
(with RW-delay)
(no RW-delay)
(with RW-delay)
(no RW-delay)
1)
1)
)
)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
8
9
12
13
14
15
16
17
18
20
21
t
A
+
CC 10 +
CC 4 +
CC 10 +
CC -10 +
CC 30 +
CC 50 +
SR –
SR –
SR –
SR –
SR 0
SR –
SR –
t
C
+
min.
t
F
Max. CPU Clock
(80 ns at 25 MHz CPU clock without waitstates)
t
A
= 25 MHz
t
t
t
t
A
A
C
C
t
51
A
max.
–
–
–
–
–
–
20 +
40 +
40 +
t
50 +
2
–
26 +
2
10 +
2
A
t
t
t
A
A
A
+
+
+
+
t
t
t
C
t
t
t
C
C
C
F
F
1)
1)
1 / 2TCL = 1 to 25 MHz
min.
TCL - 10
+
TCL - 16
+
TCL - 10
+
-10
+
2TCL - 10
+
3TCL - 10
+
–
–
–
–
0
–
–
Variable CPU Clock
t
t
t
t
t
t
A
A
A
A
C
C
max.
–
–
–
–
–
–
2TCL - 20
+
3TCL - 20
+
3TCL - 20
+
4TCL - 30
+ 2
–
2TCL - 14
+ 22
+
TCL - 10
+ 22
+
t
t
t
t
t
C
C
A
F
F
t
1)
1)
A
+
t
t
V2.0, 2001-01
A
A
+
t
C
t
C
C161O
C161K
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns