74LVTH244MTC Fairchild Semiconductor, 74LVTH244MTC Datasheet - Page 5

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74LVTH244MTC

Manufacturer Part Number
74LVTH244MTC
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVTHr
Datasheet

Specifications of 74LVTH244MTC

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Logic Family
74LVT
Number Of Channels Per Chip
Octal
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Low Level Output Current
64 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8
Output Type
3-State
Propagation Delay Time
4.2 ns @ 2.7 V or 3.9 ns @ 3.3 V
Logic Device Type
Buffer, Non Inverting
Supply Voltage Range
2.7V To 3.6V
Logic Case Style
TSSOP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Family Type
LVTH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVTH244MTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
©1999 Fairchild Semiconductor Corporation
74LVT244, 74LVTH244 Rev. 1.5.0
Dynamic Switching Characteristics
Notes:
7. Characterized in SOIC package. Guaranteed parameter, but not tested.
8. Max number of outputs defined as (n). n–1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Notes:
9. All typical values are at V
10. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
Capacitance
Note:
11. Capacitance is measured at frequency f
t
OSHL
Symbol
Symbol
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (t
Symbol
V
V
t
t
t
t
t
t
C
PLH
PHL
PZH
PHZ
PZL
PLZ
OLP
OLV
C
, t
OUT
IN
OSLH
Quiet Output Maximum
Dynamic V
Quiet Output Minimum
Dynamic V
Propagation Delay, Data to Output
Output Enable Time
Output Disable Time
Output to Output Skew
Input Capacitance
Output Capacitance
(11)
Parameter
Parameter
OSHL
OL
OL
Parameter
CC
) or LOW-to-HIGH (t
3.3V, T
(10)
A
V
CC
25°C.
3.3
3.3
1MHz, per MIL-STD-883, Method 3012.
V
V
(V)
CC
CC
(7)
OSLH
(8)
(8)
0V, V
3.0V, V
C
Min.
1.1
1.3
1.1
1.4
1.9
1.8
). Parameter guaranteed by design.
L
V
5
Conditions
I
CC
Conditions
50pF, R
O
0V or V
Typ.
0V or V
3.3V ± 0.3V
C
T
L
A
L
CC
(9)
CC
50pF, R
–40°C to +85°C
500
Max.
3.8
3.9
4.5
4.4
4.9
4.4
1.0
L
Min.
500
Min.
1.3
1.1
1.4
1.9
1.8
1.1
Typical
V
T
CC
A
3
6
Typ.
–0.8
0.8
25°C
2.7V
Max.
4.0
4.2
5.3
5.0
5.1
4.4
1.0
Max.
www.fairchildsemi.com
Units
pF
pF
Units
Units
ns
ns
ns
ns
V
V

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