74LVT16245MTD Fairchild Semiconductor, 74LVT16245MTD Datasheet - Page 5
![IC TRANSCVR TRI-ST 16BIT 48TSSOP](/photos/6/92/69261/261-48-tssop_w_sml.jpg)
74LVT16245MTD
Manufacturer Part Number
74LVT16245MTD
Description
IC TRANSCVR TRI-ST 16BIT 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVTr
Datasheet
1.74LVT16245MTDX.pdf
(8 pages)
Specifications of 74LVT16245MTD
Logic Type
Transceiver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Device Type
Transceiver, Non Inverting
Supply Voltage Range
2.7V To 3.6V
Logic Case Style
TSSOP
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LVT16245MTD-TEL1
Manufacturer:
FAIR
Quantity:
1 000
Part Number:
74LVT16245MTDX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
I
I
(Note 5)
I
I
I
I
I
'
(Note 8)
V
V
t
t
t
t
t
t
t
t
C
C
OZH
OZH
OZH
CCH
CCL
CCZ
CCZ
PLH
PHL
PZH
PZL
PHZ
PLZ
OSHL
OSLH
DC Electrical Characteristics
Note 5: Applies to bushold versions only (74LVTH16245).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V
Dynamic Switching Characteristics
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
Capacitance
Note 12: Capacitance is measured at frequency f
I
OLP
OLV
Symbol
CC
Symbol
IN
I/O
Symbol
Symbol
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
Increase in Power Supply Current
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
Propagation Delay Data to Output
Output Enable Time
Output Disable Time
Output to Output Skew
(Note 11)
Input Capacitance
Input/Output Capacitance
Parameter
(Note 12)
Parameter
Parameter
Parameter
OL
1 data inputs are driven 0V to 3V. Output under test held LOW.
OL
1 MHz, per MIL-STD-883, Method 3012.
V
(V)
3.3
3.3
CC
V
V
(Continued)
CC
CC
V
0V, V
3.0V, V
(V)
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
CC
Min
I
(Note 9)
5
O
0V or V
Conditions
T
0V or V
A
Min
T
A
CC
Typ
0.8
40
0.8
OSHL
CC
25
V
q
Min
1.5
1.3
1.5
1.6
2.3
2.2
C to
CC
q
C
) or LOW-to-HIGH (t
Max
0.19
0.19
0.19
3.3V
5.0
0.2
10
85
5
5
q
Max
C
C
T
r
L
A
0.3V
Max
3.5
3.5
4.5
5.3
5.4
5.1
1.0
CC
50 pF, R
or GND.
40
Units
mA
mA
mA
mA
mA
P
P
P
q
OSLH
A
A
A
C to
Units
V
V
L
). Parameter guaranteed by design.
Min
1.5
1.3
1.5
1.6
2.3
2.2
Typical
85
500
V
V
V
Outputs HIGH
Outputs LOW
Outputs Disabled
V
Outputs Disabled
One Input at V
Other Inputs at V
V
q
O
O
CC
CC
4
8
C
CC
:
d
3.0V
3.6V
V
V
C
www.fairchildsemi.com
2.7V
O
O
L
d
d
Conditions
Max
3.9
3.9
5.3
6.9
6.1
5.4
1.0
50 pF, R
5.5V
5.5V,
Conditions
(Note 10)
(Note 10)
CC
CC
0.6V
L
Units
or GND
pF
pF
Units
500
ns
ns
ns
ns
: