CY22150 Cypress Semiconductor Corporation., CY22150 Datasheet

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CY22150

Manufacturer Part Number
CY22150
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-07104 Rev. *D
Logic Block Diagram
• Integrated phase-locked loop (PLL)
• Commercial and industrial operation
• Flash-programmable
• Field-programmable
• 2-wire serial programming interface
• Low-skew, low-jitter, high-accuracy outputs High performance suited for commercial, industrial, networking, telecomm
• 3.3V operation with 2.5V output option
• 16-lead TSSOP
Pin Configuration
Serial
Programming
Interface
Features
XOUT
XIN
and 2-Wire Serially Programmable Clock Generator
SDAT
SCLK
One-PLL General-Purpose Flash-Programmable
OSC.
Control
SPI
Q
3901 North First Street
P
VDD
LCLK1
LCLK2
AVDD
SDAT
AVSS
Internal PLL to generate six outputs up to 200 MHz. Able to generate custom
frequencies from an external crystal or a driven source.
Performance guaranteed for applications that require an extended temper-
ature range.
Nonvolatile reprogrammable technology allows easy customization, quick
turnaround on design changes and product performance enhancements,
and better inventory control. Parts can be reprogrammed up to 100 times,
reducing inventory of custom parts and providing an easy method for
upgrading existing designs.
The CY22150 can be programmed at the package level. In-house
programming of samples and prototype quantities is available using the
CY3672 FTG Development Kit. Production quantities are available through
Cypress’s value-added distribution partners or by using third party
programmers from BP Microsystems, HiLo Systems, and others.
The CY22150 provides an industry-standard interface for volatile,
system-level customization of unique frequencies and options. Serial
programming and reprogramming allows quick design changes and product
enhancements, eliminates inventory of old design parts, and simplifies
manufacturing.
and other general-purpose applications.
Application compatibility in standard and low-power systems.
Industry-standard packaging saves on board space.
VSSL
VCO
PLL
VDD
XIN
VSS
1
2
3
4
5
6
7
8
AVDD
AVSS
16
15
14
13
12
11
10
Divider
Bank 1
Divider
Bank 2
9
XOUT
CLK6
CLK5
VSS
LCLK4
VDDL
SCLK
LCLK3
VDDL
VSSL
San Jose
Crosspoint
Switch
Benefits
Matrix
,
CA 95134
LCLK2
LCLK1
LCLK3
LCKL4
CLK5
CLK6
Revised May 17, 2003
408-943-2600
CY22150

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CY22150 Summary of contents

Page 1

... Parts can be reprogrammed up to 100 times, reducing inventory of custom parts and providing an easy method for upgrading existing designs. The CY22150 can be programmed at the package level. In-house programming of samples and prototype quantities is available using the CY3672 FTG Development Kit. Production quantities are available through Cypress’ ...

Page 2

... DDL The basic PLL block diagram is shown in Figure 1. Each of the six clock outputs on the CY22150 has a total of seven output options available to it. There are six post divider options available: /2 (two of these), /3, /4, /DIV1N and /DIV2N. DIV1N and DIV2N are independently calculated and are applied to individual output groups ...

Page 3

... SPI registers will need to be reconfigured again. All programmable registers in the CY22150 are addressed with eight bits and contain eight bits of data. The CY22150 is a slave device with an address of 1101001 (69H). Table 1 lists the SPI registers and their definitions. Specific register definitions and their allowable values are listed below ...

Page 4

... Table 4. Programmable External Reference Input Oscillator Drive Settings Reference Frequency Drive Setting Document #: 38-07104 Rev. *D Using an External Clock as the Reference Input The CY22150 can also accept an external clock as reference, with speeds up to 133 MHz. With an external clock, the XDRV (register 12H) bits must be set according to Table ...

Page 5

... Input Load Capacitors Input load capacitors allow the user to set the load capacitance of the CY22150 to match the input load capacitance from a crystal. The value of the input load capacitors is determined by 8 bits in a programmable register [13H]. Total load capacitance is determined by the formula: CapLoad = (CL– ...

Page 6

... CLK5 and CLK6 is set by V Test, Reserved, and Blank Registers Writing to any of the following registers will cause the part to exhibit abnormal behavior, as follows. [00H to 08H] [0AH to 0BH] [0DH to 11H] [14H to 3FH] [43H] [48H to FFH] phase-aligned with CY22150 D2 D1 Pump(0) PB(9) PB(2) PB(1) Q(2) Q( Pump(0) ...

Page 7

... Acknowledge Pulse During Write mode, the CY22150 will respond with an ACK pulse after every eight bits. This is accomplished by pulling the SDAT line LOW during the N*9 Figure the number of eight-bit segments transmitted.) During Read mode, the ACK pulse after the data packet is sent is generated by the master ...

Page 8

... Device Data Data (XXH) Address (XXH) (XXH+1) Figure 3. Data Frame Architecture Transition START to next bit Figure 4. Start and Stop Frame + RA7 RA6RA1 RA0 + Description CY22150 1-bit 1-bit 1-bit 1-bit Slave Slave Slave Slave ACK ACK ACK ACK 8-bit 8-bit Register Register ...

Page 9

... For more information, refer to the application note “Jitter in PLL-Based Systems: Causes, Effects, and Solutions” available at http://www.cypress.com/clock/appnotes.html, or contact your local Cypress field applications engineer. OUTPUTS GND t4 CLK Figure 7. Rise and Fall Time Definitions CY22150 CLK out C LOAD V DDL 0 50% ...

Page 10

... Typ. Max. 3.3 3.465 3.3 3.465 2.5 2.625 133 8 30 500 Min. Typ. Max 0.7 0 CY22150 Unit V V °C ° Unit °C ° MHz MHz ms Unit ...

Page 11

... Systems: Causes, Effects, and Solutions,” available at http://wwww.cypress.com/clock/appnotes.html, or contact your local Cypress field appli- cations engineer). 10. The CY22150ZC-xxx and CY22150ZI-xxx are factory programmed configurations. Factory programming is available for high-volume design opportunities of 100Ku/year or more in production. For more details, contact your local Cypress FAE or Cypress Sales Representative. ...

Page 12

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY22150 51-85091-** ...

Page 13

... Document History Page Document Title: CY22150 One-PLL General-Purpose Flash-Programmable and 2-Wire Serially-Programmable Clock Generator Document Number: 38-07104 ECN Issue REV. NO. Date ** 107498 08/08/01 *A 110043 02/06/02 *B 113514 05/01/02 *C 121868 12/14/02 *D 125453 05/19/03 Document #: 38-07104 Rev. *D Orig. of Change Description of Change CKN New Data Sheet CKN Preliminary to Final CKN ...

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