EL1883 Intersil Corporation, EL1883 Datasheet

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EL1883

Manufacturer Part Number
EL1883
Description
Manufacturer
Intersil Corporation
Datasheet

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Sync Separator with Horizontal Output
This device extracts sync timing information from both
standard and non-standard video input and also in the
presence of Macrovision pulses. It provides composite sync,
vertical sync, burst/back porch timing, and horizontal
outputs. Fixed 70mV sync tip slicing provides sync edge
detection when the video input level is between 0.5V
2V
external resistor sets all internal timing to adjust for various
video standards. The composite sync output follows video in
sync pulses and a vertical sync pulse is output on the rising
edge of the first vertical serration following the vertical pre-
equalizing string. For non-standard vertical inputs, a default
vertical pulse is output when the vertical signal stays low for
longer than the vertical sync default delay time. The
horizontal output gives horizontal timing with pre/post
equalizing pulses.
The EL1883 is available in an 8-pin SO package and is
specified for operation over the full -40°C to +85°C
temperature range.
Ordering Information
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
EL1883IS
EL1883IS-T7
EL1883IS-T13
EL1883ISZ
(See Note)
EL1883ISZ-T7
(See Note)
EL1883ISZ-
T13 (See Note)
P-P
NUMBER
PART
(sync tip amplitude 143mV to 572mV). A single
PACKAGE
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin SO
(Pb-free)
(Pb-free)
(Pb-free)
The EL1883 video sync separator is
manufactured using Elantec’s high
performance analog CMOS process.
®
1
TAPE & REEL
Data Sheet
13”
13”
7”
7”
-
-
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
PKG. DWG. #
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
P-P
1-888-INTERSIL or 321-724-7143
and
CCAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• NTSC, PAL, SECAM, non-standard video sync separation
• Fixed 70mV slicing of video input levels from 0.5V
• Low supply current - 1.5mA typ.
• Single 3V to 5V supply
• Composite sync output
• Vertical output
• Horizontal output
• Burst/back porch output
• Macrovision compatible
• Available in 8-pin SO package
• Pb-free available
Applications
• Video amplifiers
• PCMCIA applications
• A/D drivers
• Line drivers
• Portable computers
• High speed communications
• RGB applications
• Broadcast equipment
• Active filtering
Demo Board
• A dedicated demo board is available
Pinout
COMPOSITE SYNC OUT
COMPOSITE VIDEO IN
VERTICAL SYNC OUT
2V
P-P
All other trademarks mentioned are the property of their respective owners.
July 26, 2004
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
GND
1
2
3
4
(8-PIN SO)
TOP VIEW
EL1883
8
7
6
5
VDD
HORIZONTAL OUTPUT
RSET
BURST/BACK
PORCH OUTPUT
EL1883
FN7010.1
P-P
to

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EL1883 Summary of contents

Page 1

... The horizontal output gives horizontal timing with pre/post equalizing pulses. The EL1883 is available in an 8-pin SO package and is specified for operation over the full -40°C to +85°C temperature range. Ordering Information ...

Page 2

... Horizontal Sync Width Vertical Sync Width Vertical Sync Default Delay, t VSD Burst/Back Porch Delay Burst/Back Porch Width Input Dynamic Range Slice Level 2 EL1883 = 25°C) Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C +0.5V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C CC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400mW = 3.3V 25° 681kΩ ...

Page 3

... SET FIGURE 3. HORIZONTAL SYNC WIDTH EL1883 Composite sync pulse output; sync pulses start on a falling edge and end on a rising edge AC coupled composite video input; sync tip must be at the lowest potential (positive picture phase) Vertical sync pulse output; the falling edge of vert sync is the start of the vertical period Supply ground Burst/back porch output ...

Page 4

... V =3V DD 225 224 223 V =5V 222 DD 221 220 -50 -30 - TEMPERATURE (°C) FIGURE 9. VERTICAL SYNC PULSE WIDTH vs TEMPERATURE 4 EL1883 (Continued =5V DD 600 700 800 FIGURE 6. BURST/BACK PORCH DELAY vs TEMPERATURE SET = = FIGURE 8. BURST/BACK PORCH WIDTH vs TEMPERATURE ...

Page 5

... Horizontal sync output produces the true “H” pulses of nominal width of 5µs. It has the same delay as the composite sync. 5 EL1883 (Continued) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 ...

Page 6

... EL1883 FIGURE 13. STANDARD VERTICAL TIMING FIGURE 14. NON-STANDARD VERTICAL TIMING 6 ...

Page 7

... HORIZONTAL SYNC, PIN 7 BACK PORCH OUTPUT, PIN 5 FIGURE 16. EXAMPLE OF EL1883 WITH NTSC SIGNAL THAT INCLUDES MACROVISION COPY PROTECTION (R =681kΩ) SET 7 EL1883 V SLICE No pulses in next 75% of line time FIGURE 15. NON-STANDARD VERTICAL TIMING I/P SIGNAL COMPOSITE SYNC OUT (PIN 1) HORIZONTAL ...

Page 8

... Vertical Sync is clocked out of the EL1883 on the first rising edge during the vertical serration phase. In the absence of vertical serration pulses, a vertical sync pulse will be forced out after the vertical sync default delay time, approximately 60µ ...

Page 9

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 EL1883 CLAMP SYNC TIP REF 1.5V ...

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