X25160S Xicor, X25160S Datasheet
X25160S
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X25160S Summary of contents
Page 1
... Timing WP Logic ™ ™ Direct Write and Block Lock Protection is a trademark of Xicor, Inc. REV 1.2 11/28/00 X25160 ™ Protection DESCRIPTION The X25160 is a CMOS 16384-bit serial EEPROM, internally organized The X25160 features a Serial Peripheral Interface (SPI) and software proto- col, allowing operation on a simple three-wire bus ...
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... CS goes LOW. SCK is static, allowing the user to stop the clock and then resume operations. If the clock line is shared with other peripheral devices on the SPI bus, the user can assert the HOLD input to place the www.xicor.com Characteristics subject to change without notice. DIP/SOIC 8 ...
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... Write status register Read data from memory array beginning at selected address Write data to memory array beginning at selected address (1 to 32-bytes) Protected Blocks Unprotected Blocks Protected Protected Protected Protected Protected Protected www.xicor.com Array Addresses BP0 Protected 0 None 1 $0600–$07FF 0 $0400–$07FF 1 $0000– ...
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... The device is in the LOW power standby state. – A HIGH to LOW transition required to enter an active state and receive an instruction. – SO pin is HIGH impedance. – The “write enable” latch is reset. www.xicor.com Characteristics subject to change without notice. ) under normal ...
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... Bit Address Instruction 7 6 MSB www.xicor.com Data Out MSB Data Out Characteristics subject to change without notice ...
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... SCK Instruction SI High Impedance SO REV 1.2 11/28/ High Impedance Bit Address www.xicor.com 7 Data Byte Characteristics subject to change without notice ...
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... Bit Address Data Byte Instruction 7 www.xicor.com Data Byte Data Byte Data Byte ...
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... 0.4 V – 0.8 CC 0.4 V – 0.3 CC Parameter = 5V CC Test Max. is stable until the specified operation can be initiated. These parameters CC www.xicor.com Limits X25160-2.7 2.7V to 5.5V Unit Test Conditions mA SCK = V x 0.1/V x 0.9 @ 2MHz Open µ µA V ...
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... Input pulse levels 3V Input rise and fall times 1.64KΩ Input and output timing level 100pF Min. 0 500 250 250 200 200 50 50 100 100 2.0 Min 100 100 www.xicor.com 10ns V x 0.5 CC Max. Unit 2 MHz µs 2 µ ...
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... SCK MSB Out ADDR SI LSB IN Serial Input Timing CS t LEAD SCK MSB In High Impedance SO REV 1.2 11/28/ CYC MSB–1 Out www.xicor.com t LAG DIS LSB Out LAG t FI LSB In Characteristics subject to change without notice ...
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... LOW to HIGH to HIGH May change Will change from HIGH from HIGH to LOW to LOW Don’t Care: Changing: Changes State Not Allowed Known N/A Center Line is High Impedance REV 1.2 11/28/ www.xicor.com Characteristics subject to change without notice ...
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... Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) Pin 1 Index Pin 1 0.300 (7.62) Ref. Seating Plane 0.150 (3.81) 0.125 (3.18) 0.110 (2.79) 0.090 (2.29) 0.325 (8.25) 0.300 (7.62) Max. www.xicor.com 0.260 (6.60) 0.240 (6.10) 0.060 (1.52) 0.020 (0.51) 0.145 (3.68) 0.128 (3.25) 0.025 (0.64) 0.015 (0.38) 0.065 (1.65) 0.045 (1.14) 0.020 (0.51) 0.016 (0.41) 0° 15° Characteristics subject to change without notice. ...
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... NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) REV 1.2 11/28/00 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.010 (0.25) FOOTPRINT www.xicor.com 0.150 (3.80) 0.228 (5.80) 0.158 (4.00) 0.244 (6.20) 0.053 (1.35) 0.069 (1.75) 0.004 (0.19) 0.010 (0.25) 0.050" Typical 0.050" Typical 0.250" 0.030" Typical 8 Places Characteristics subject to change without notice ...
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... Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to discontinue production and change specifications and prices at any time and without notice. Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents, or licenses are implied. TRADEMARK DISCLAIMER: Xicor and the Xicor logo are registered trademarks of Xicor, Inc ...