74ABT244CMTC Fairchild Semiconductor, 74ABT244CMTC Datasheet

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74ABT244CMTC

Manufacturer Part Number
74ABT244CMTC
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74ABTr
Datasheets

Specifications of 74ABT244CMTC

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Logic Family
ABT
Number Of Channels Per Chip
8
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Low Level Output Current
64 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8 / 3
Output Type
3-State
Propagation Delay Time
3.6 ns at 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ABT244CMTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
©1992 Fairchild Semiconductor Corporation
74ABT244 Rev. 1.4
74ABT244
Octal Buffer/Line Driver with 3-STATE Outputs
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Pb-Free package per JEDEC J-STD-020B.
Note:
1. Device available in Tape and Reel only.
74ABT244CSC
74ABT244CSJ
74ABT244CMSA
74ABT244CMSAX_NL
74ABT244CMTC
74ABT244CMTCX_NL
Non-inverting buffers
Output sink capability of 64mA, source capability of
32mA
Guaranteed output skew
Guaranteed multiple output switching specifications
Output switching specified for both 50pF and 250pF
loads
Guaranteed simultaneous switching, noise level and
dynamic threshold performance
Guaranteed latchup protection
High-impedance, glitch-free bus loading during entire
power up and power down cycle
Nondestructive, hot-insertion capability
Disable time less than enable time to avoid bus
contention
Order Number
(1)
(1)
Package
Number
MSA20
MSA20
MTC20
MTC20
M20D
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013,
0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150,
5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150,
5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
General Description
The ABT244 is an octal buffer and line driver with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented trans-
mitter/receiver.
Package Description
www.fairchildsemi.com
March 2007
tm

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74ABT244CMTC Summary of contents

Page 1

... Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Note: 1. Device available in Tape and Reel only. ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 General Description ...

Page 2

... Connection Diagram ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Pin Descriptions Pin Names Description Output Enable Input (Active LOW –I Inputs –O Outputs 0 7 Truth Table 0–3 0– HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance 4–7 4– www.fairchildsemi.com ...

Page 3

... Free Air Ambient Temperature A V Supply Voltage CC ∆ ∆ t Minimum Input Edge Rate Data Input Enable Input ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Parameter Parameter 3 Rating –65°C to +150°C –55°C to +125°C –55°C to +150°C –0.5V to +7.0V – ...

Page 4

... Outputs Enabled CCT I /Input CC Outputs 3-STATE Outputs 3-STATE I Dynamic I No Load CCD CC Notes: < 0.8mA/MHz. 3. For 8-bit toggling, I CCD 4. Guaranteed, but not tested. ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 V Conditions CC Recognized HIGH Signal Recognized LOW Signal = –18mA Min –3mA Min –32mA I ...

Page 5

... AC Electrical Characteristics SOIC and SSOP package. Symbol Parameter t Propagation Delay PLH Data to Outputs t PHL t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Conditions = 50pF 500Ω 25°C 5 25°C 5 25°C 5 ...

Page 6

... LOW-to-HIGH, HIGH-to-LOW, etc.) with 250pF load capacitors in place of the 50pF load capacitors in the standard AC load. 11. The 3-STATE delays are dominated by the RC network (500Ω, 250pF) on the output and have been excluded from the datasheet. ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 = –40°C to +85°C, T – ...

Page 7

... This specification is guaranteed but not tested. Capacitance Symbol Parameter C Input Capacitance IN (17) C Output Capacitance OUT Note: is measured at frequency f = 1MHz, per MIL-STD-883, Method 3012. 17. C OUT ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 = –40°C to +85°C, = –40°C to +85° 4.5V–5.5V 50pF, C ...

Page 8

... Figure 2. Test Input Signal Levels Amplitude Rep. Rate 3.0V 1 MHz 500ns Figure 3. Test Input Signal Requirements Figure 4. Propagation Delay, Pulse Width Waveforms ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 *Includes jig and probe capacitance Figure 1. Standard AC Test Load Figure 5. 3-STATE Output HIGH and LOW Enable ...

Page 9

... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Package Number M20B 9 www.fairchildsemi.com ...

Page 10

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 9. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Package Number M20D 10 www.fairchildsemi.com ...

Page 11

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 10. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Package Number MSA20 11 www.fairchildsemi.com ...

Page 12

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 11. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1992 Fairchild Semiconductor Corporation 74ABT244 Rev. 1.4 Package Number MTC20 12 www.fairchildsemi.com ...

Page 13

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...

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