74LCXH16244GX Fairchild Semiconductor, 74LCXH16244GX Datasheet
74LCXH16244GX
Specifications of 74LCXH16244GX
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74LCXH16244GX Summary of contents
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... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [RAIL] 74LCXH162244MTX MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE and REEL] © 2005 Fairchild Semiconductor Corporation Features 5V tolerant control inputs and outputs 2.3V–3.6V V specifications provided CC ...
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Connection Diagram www.fairchildsemi.com Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW –I Bushold Inputs –O Outputs ...
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Truth Tables Inputs OE I – Inputs OE I – HIGH Voltage Level L LOW Voltage Level Functional Description The LCXH162244 ...
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Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output ...
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DC Electrical Characteristics Symbol Parameter I Input Leakage Current Data I Control I Bushold Input Minimum I(HOLD) Drive Hold Current I Bushold Input Over-Drive I(OD) Current to Change State I 3-STATE Output Leakage OZ I Power-Off Leakage Current OFF I ...
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AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C 6V for V V Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; f =1MHz, ...
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Schematic Diagram Generic for LCXH Family 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide www.fairchildsemi.com Package Number MS48A 8 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...