74ABT125D,602 NXP Semiconductors, 74ABT125D,602 Datasheet - Page 2
![IC BUFF TRI-ST QD N-INV 14SOICN](/photos/6/57/65749/14-soic-sot108-1_sml.jpg)
74ABT125D,602
Manufacturer Part Number
74ABT125D,602
Description
IC BUFF TRI-ST QD N-INV 14SOICN
Manufacturer
NXP Semiconductors
Series
74ABTr
Datasheet
1.74ABT125D623.pdf
(16 pages)
Specifications of 74ABT125D,602
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1372-5
74ABT125D
935056850602
74ABT125D
935056850602
NXP Semiconductors
4. Functional diagram
5. Pinning information
74ABT125
Product data sheet
Fig 1.
Fig 4.
Logic symbol
Pin configuration DIP14, SO14 and (T)SSOP14
10
12
13
2
1
5
4
9
GND
1OE
2OE
1A
1Y
2A
2Y
1OE
2OE
3OE
4OE
1A
2A
3A
4A
5.1 Pinning
1
2
3
4
5
6
7
mna228
1Y
2Y
3Y
4Y
74ABT125
11
3
6
8
001aai027
14
13
12
11
10
9
8
All information provided in this document is subject to legal disclaimers.
Fig 2.
V
4OE
4A
4Y
3OE
3A
3Y
CC
Rev. 5 — 24 November 2010
IEC logic symbol
10
12
13
2
1
5
4
9
EN1
mna229
1
Fig 5.
(1) This is not a supply pin. The substrate is attached to this
11
3
6
8
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration DHVQFN14
index area
terminal 1
2OE
1A
1Y
2A
2Y
Fig 3.
nOE
Transparent top view
nA
2
3
4
5
6
74ABT125
GND
Logic diagram (one buffer)
(1)
74ABT125
Quad buffer; 3-state
13
12
11
10
9
001aai028
© NXP B.V. 2010. All rights reserved.
4OE
4A
4Y
3OE
3A
mna227
2 of 16
nY