M25P128-VME6TP Numonyx, B.V., M25P128-VME6TP Datasheet - Page 38

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M25P128-VME6TP

Manufacturer Part Number
M25P128-VME6TP
Description
128 Mbit (Multilevel), low-voltage, Serial Flash memory with 50-MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet
DC and AC parameters
38/45
Table 14.
1. t
2. Value is guaranteed by characterization, not 100% tested in production.
3. Expressed as a slew-rate.
4. Only applicable as a constraint for WRSR instruction when SRWD is set to 1.
5. V
6. Due to the Multi Level Cell technology, when using the Page Program (PP) instruction to program
Figure 20. Serial input timing
S
C
D
Q
Symbol
(success or failure) is known.
consecutive Bytes, optimized timings are obtained with one sequence including all the Bytes versus
several sequences of only a few Bytes. If only a single byte is programmed, the estimated programming
time is close to the time needed to program a full page of 256 Bytes. Therefore, it is highly recommended
to use the Page Program (PP) instruction with a sequence of 256 consecutive Bytes. (1 ≤ n ≤ 256)
CH
PPH
t
BE
and t
should be kept at a valid level until the program or erase operation has completed and its result
tCHSL
CL
must be greater than or equal to 1/f
AC characteristics (continued)
Alt.
tDVCH
Bulk Erase Cycle Time
Bulk Erase Cycle Time (V
Test conditions specified in
High Impedance
MSB IN
tSLCH
tCHDX
Parameter
C
(max).
PP
= V
Table 10
PPH
tCLCH
)
tCHSH
and
LSB IN
Table 11
Min.
tCHCL
tSHSL
56
Typ.
105
(2)
tSHCH
Max.
250
AI01447C
M25P128
Unit
s

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