M25P64-VME6TP Numonyx, B.V., M25P64-VME6TP Datasheet - Page 23
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M25P64-VME6TP
Manufacturer Part Number
M25P64-VME6TP
Description
64 Mbit, low voltage, Serial Flash memory with 50 MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet
1.M25P64-VME6TP.pdf
(50 pages)
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M25P64
6.1
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Write Enable (WREN) instruction sequence
S
C
D
Q
High Impedance
0
(Figure
1
2
Instruction
3
8) sets the Write Enable Latch (WEL) bit.
4
5
6
7
AI02281E
Instructions
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