M25PE16 Numonyx, B.V., M25PE16 Datasheet - Page 36

no-image

M25PE16

Manufacturer Part Number
M25PE16
Description
16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout
Manufacturer
Numonyx, B.V.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M25PE16
Manufacturer:
ST
Quantity:
1 000
Part Number:
M25PE16
Manufacturer:
ST
0
Part Number:
M25PE16-VMN6TG
Manufacturer:
ST
0
Part Number:
M25PE16-VMN6TP
Manufacturer:
ST
0
Part Number:
M25PE16-VMP6
Manufacturer:
ST
0
Part Number:
M25PE16-VMP6G
Manufacturer:
ST
Quantity:
20 000
Part Number:
M25PE16-VMP6TG
Manufacturer:
ST
Quantity:
20 000
Part Number:
M25PE16-VMW6TG
Manufacturer:
MAXIM
Quantity:
14 500
Part Number:
M25PE16-VMW6TG
Manufacturer:
Numonyx
Quantity:
15 000
Part Number:
M25PE16-VMW6TG
Manufacturer:
ST
Quantity:
20 000
Part Number:
M25PE16-VMW6TG
0
Company:
Part Number:
M25PE16-VMW6TG
Quantity:
6 000
Instructions
6.11
36/58
Write to lock register (WRLR)
The write to lock register (WRLR) instruction allows bits to be changed in the lock registers.
Before it can be accepted, a write enable (WREN) instruction must previously have been
executed. After the write enable (WREN) instruction has been decoded, the device sets the
write enable latch (WEL).
The write to lock register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the targeted
sector and one data byte on serial data input (D). The instruction sequence is shown in
Figure
latched in, otherwise the write to lock register (WRLR) instruction is not executed.
Lock register bits are volatile, and therefore do not require time to be written. When the write
to lock register (WRLR) instruction has been successfully executed, the write enable latch
(WEL) bit is reset after a delay time less than t
Any write to lock register (WRLR) instruction, while an erase, program or write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 16. Write to lock register (WRLR) instruction sequence
Table 10.
All sectors
S
C
D
16. Chip Select (S) must be driven High after the eighth bit of the data byte has been
Sector
Lock register in
0
1
2
Instruction
3
4
b7-b2
Bit
b1
b0
5
6
7
Sector lock down bit value (refer to
Sector write lock bit value (refer to
MSB
23
8
22 21
9 10
24-bit address
SHSL
3
28 29 30 31 32 33 34 35
2
minimum value.
1
0
MSB
7
Value
‘0’
6
Lock register
5
Table
Table
4
in
3
9)
36 37 38
9)
2
1
0
39
M25PE16
AI10784

Related parts for M25PE16