STPCC03 STMicroelectronics, STPCC03 Datasheet - Page 11

• Manufacturer Part Number: STPCC03
• Description: STPC CONSUMER-S DATASHEET- PC COMPATIBLE EMBEDDED MICROPROCESSOR
• Manufacturer: STMicroelectronics

Table 2-2. Definition of Signal Pins
SA[19:0]
SD[15:0]
ALE
MEMR#
SMEMR#
IOR#
MCS16#
BHE#
ZWS#
REF#
MASTER#
AEN
IOCHCK#
IOCHRDY
ISAOE#
GPIOCS#
IRQ_MUX[3:0]
DREQ_MUX[1:0]
DACK_ENC[2:0]
TC
RTCAS#
RMRTCCS#
KBCS#
RTCRW#
RTCDS#
LOCAL BUS
PA[21:0]
PD[15:0]
PRD1#,PRD0#
PWR1#,PWR0#
PRDY#
FCS1#, FCS0#
IOCS#[3:0]
IDE CONTROL
DA[2:0]
DD[15:0]
PCS3#,PCS1#,SCS3#,SCS1#
DIORDY
PIRQ
PDRQ
PDACK#
PDIOR#
PDIOW#
Note
Note
Note
2
2
2
1
2
2
3
2
2
; These pins must be connected to the 2.5Vpower supply. They must not be connected to the 3.45V supply.
; Denotes that the pin is V
2
, IOW#
2
; see Table 2-5 for the detail of individual V
, SIRQ
2
2
, SDRQ
2
2
2
2
2
2
2
2
2
, MEMW#
, SDIOR#
2
2
Signal Name
, IOCS16#
, SDIOW#
2
2
, SDACK#
2
, SMEMW#
2
2
2
2
2
2
2
2
2
2
2
2
2
2
5T
(see Section 4 )
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
Issue 1.1 - October 16, 2000
Latched Address
Data Bus
Address Latch Enable
Memory Read and Memory Write
System Memory Read and Memory Write
I/O Read and Write
Memory/IO Chip Select16
System Bus High Enable
Zero Wait State
Refresh Cycle.
Add On Card Owns Bus
Address Enable
I/O Channel Check.
I/O Channel Ready (ISA) - Busy/Ready (IDE)
ISA/IDE Selection
General Purpose Chip Select
Time-Multiplexed Interrupt Request
Time-Multiplexed DMA Request
Encoded DMA Acknowledge
ISA Terminal Count
Real Time Clock Address Strobe
ROM/RTC Chip Select
Keyboard Chip Select
RTC Read/Write
RTC Data Strobe
Address Bus
Data Bus
Peripheral Read Control
Peripheral Write Control
Data Ready
Flash Chip Select
I/O Chip Select
Address Bus
Data Bus
Primary & Secondary Chip Selects
Data I/O Ready
Primary & Secondary Interrupt Request
Primary & Secondary DMA Request
Primary & Secondary DMA Acknowledge
Primary & Secondary I/O Channel Read
Primary & Secondary I/O Channel Write
5T
signals
Description
PIN DESCRIPTION
Qty
20
16
22
16
16
1
2
2
2
2
1
1
1
1
1
1
1
1
1
4
2
3
1
1
1
1
1
1
2
2
1
2
4
3
4
1
2
2
2
2
2
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