STPCI2 STMicroelectronics, STPCI2 Datasheet - Page 13
STPCI2
Manufacturer Part Number
STPCI2
Description
STPC ATLAS DATASHEET - X86 CORE PC COMPATIBLE SYS
Manufacturer
STMicroelectronics
Datasheet
1.STPCI2.pdf
(111 pages)
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2. PIN DESCRIPTION
2.1. INTRODUCTION
The
functionalities of the PC architecture. Therefore,
many of the traditional interconnections between
the host PC microprocessor and the peripheral
devices are totally internal to the STPC Atlas. This
offers improved performance due to the tight
coupling of the processor core and it’s peripherals.
As a result many of the external pin connections
are made directly to the on-chip peripheral
functions.
Table 2-1
listing signal types and their functionalities.
2-2
Table 2-6
package pin location physical connection. Please
refer to the pin allocation drawing for reference.
Due to the number of pins available for the
package, and the number of functional I/Os, some
pins have several functions, selectable by strap
option on Reset.
these pins and their functions.
Non multi-functional pins associated with a
particular function are not available for use
elsewhere when that function is disabled. For
example, when in the ISA mode, the Local Bus is
provides a full pin listing and description.
STPC
provides a full listing of the STPC Atlas
describes the physical implementation
Atlas
Table 2-4
integrates
provides a summary of
most
Issue 1.0 - July 24, 2002
of
Table
the
disabled totally and Local Bus pins are set to the
tri-state (high-impedance) condition.
Basic Clocks, Reset & Xtal (SYS)
SDRAM Controller (SDRAM)
PCI Controller
ISA Controller
Local Bus I/F
PCMCIA Controller
IDE Controller
VGA Controller (VGA) / I
Video Input Port
TFT output
USB Controller
Serial Interface
Keyboard/Mouse Controller
Parallel Port
GPIO Signals
JTAG Signals
Miscellaneous
Grounds
V
Reserved
Total Pin Count
DD
3.3 V/2.5 V
Table 2-1. Signal Description
Group name
2
C
PIN DESCRIPTION
80
67
62
34
Qty
13/111
100
516
18
96
19
95
51
10
11
24
16
16
36
6
4
5
5
4