CC2400 Chipcon AS, CC2400 Datasheet - Page 24

• Manufacturer Part Number: CC2400
• Description: 2.4 GHz RF Transceiver
• Manufacturer: Chipcon AS

Microcontroller Interface and Pin Configuration
Used in a typical system,
interface
microcontroller must be able to:
• Program
• Interface
• Optionally interface to the general
• Optionally
• Optionally, the microcontroller can read
Configuration interface
The microcontroller interface is shown in
Figure 8. The microcontroller uses a
minimum of 4 I/O pins for the SPI
configuration interface (SI, SO, SCLK and
CSn). All other pins are optional. SO
should be connected to an input at the
microcontroller. SI, SCLK and CSn must
be microcontroller outputs.
The microcontroller pins connected to SI,
SO and SCLK can be shared with other
SPI-interface devices. SO is a high
impedance output as long as CSn is not
activated (active low).
CSn should have an external pull-up
resistor or be set to a high level during
power down mode in order to prevent the
input from floating. SI and SCLK should be
set to a defined level to prevent the input
from floating.
Chipcon AS
and read back status information via
the
interface (SI, SO, SCLK and CSn). In
buffered mode the data signal is also
transmitted through the SPI-bus
synchronous data signal interface (DIO
and
transmission is to be used
control and status pins (RX, TX, FIFO,
PKT, GIO1 and GIO6) if the hardware
supported packet handling functions
are to be used
monitor the general I/O pins (GIO1,
GIO6) for frequency lock status, carrier
sense
information
back digital RSSI value and other
status information via the 4-wire SPI
interface
4-wire
DCLK)
to
status,
CC2400
SmartRF
the
a
to
SPI-bus
if
microcontroller.
®
into different modes
microcontroller
CC2400 PRELIMINARY Datasheet (rev. 1.1), 2003-10-02
the
or
un-buffered
other
configuration
bi-directional
CC2400
status
data
This
can
will
SmartRF
Signal interface in un-buffered mode
A bi-directional pin (DIO) is used for data
to be transmitted and received. DCLK
providing the data timing should be
connected to a microcontroller input.
The data is clocked in/out at the positive
edge of DCLK.
General control and status pins
Optionally, in buffered mode, the FIFO pin
can
microcontroller at full/empty FIFO. This pin
should
microcontroller interrupt pin.
Optionally, using the packet handling
support, the PKT pin can be used in
buffered
microcontroller when a sync word is
detected (RX mode) and packet is
transmitted (TX mode). This pin should
then be connected to a microcontroller
interrupt pin.
The polarity of FIFO and PKT can be
controlled by the INT register (address
0x23).
Optionally, the RX and TX pins can be
used to change the operating mode of
CC2400 as an alternative to using the SPI
interface strobe commands. These pins
should
microcontroller output pins. If the RX and
TX pins are not used, they should be
grounded in order to prevent accidental
change of mode.
Optionally, the GIO1 and GIO6 can be
used to monitor several status signals as
selected by the IOCFG register. The GIO6
pin
microcontroller input pin. See Table 9 for
available signals.
Table 6 gives a summary of the possible
pin configurations in the different operation
modes.
should
be
then
then
mode
used
be
be
®
be
to
to
connected
connected
CC2400
connected
interrupt
interrupt
Page 24 of 73
to
to
the
the
to
a
a