CC2420 Chipcon AS, CC2420 Datasheet

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CC2420

Manufacturer Part Number
CC2420
Description
2.4 GHz RF Transceiver for IEEE 802.15.4 and ZigBee
Manufacturer
Chipcon AS
Datasheet

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CC2420
2.4 GHz IEEE 802.15.4 / Zigbee RF Transceiver
Applications
Product Description
The
IEEE 802.15.4 compliant RF transceiver
designed for low-power and low-voltage
wireless applications.
digital direct sequence spread spectrum
baseband modem providing a spreading
gain of 9 dB and an effective datarate of
250 kbps.
The
solution for robust wireless communication
in the 2.4 GHz unlicensed ISM band. It
complies
covered by EN 300 440 (Europe), CFR47
Part 15 (US) and ARIB STD-T-66 (Japan).
The
support
buffering,
encryption,
channel assessment, link quality indication
and packet timing information. These
features reduce the load on the host
Key Features
This document contains information on a pre-production product. Specifications and information herein are subject to
change without notice.
Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17
2.4 GHz IEEE 802.15.4 systems
ZigBee systems
Consumer Electronics
True
802.15.4 compliant RF transceiver
with baseband modem and MAC
support
DSSS
MChips/s and 250 kbps effective data
rate.
Suitable for both RFD and FFD
operation
Low current consumption (RX: 19.7
mA, TX: 17.4 mA)
Low supply voltage (2.1 – 3.6 V) with
integrated voltage regulator
Low supply voltage (1.6 – 2.0 V) with
external voltage regulator
Programmable output power
CC2420
CC2420
CC2420
for
single-chip
with
is a low-cost, highly integrated
burst
is a true single-chip 2.4 GHz
baseband
provides extensive hardware
data
packet
world-wide
authentication,
transmissions,
CC2420
2.4
modem
handling,
GHz
regulations
includes a
with
IEEE
clear
data
data
2
SmartRF
controller and allow
low-cost microcontrollers.
The configuration interface and transmit /
receive FIFOs of
a SPI interface. In a typical application
CC2420
microcontroller and a few external passive
components.
CC2420
03 technology in 0.18 µm CMOS.
Industrial Control
Home/building automation
PC peripherals
No external RF switch / filter needed
I/Q low-IF receiver
I/Q direct upconversion transmitter
Very few external components
128 (RX) + 128 (TX) byte data
buffering
Digital RSSI / LQI support
Hardware MAC encryption (AES-128)
Battery monitor
QLP-48 package, 7x7 mm
Complies with EN 300 440 and FCC
CFR-47 part 15, ARIB STD-T-66
Powerful and flexible development
tools available
is based on Chipcon’s SmartRF
will be used together with a
CC2420
®
CC2420
CC2420
are accessed via
to interface
Page 1 of 85
®
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Related parts for CC2420

CC2420 Summary of contents

Page 1

... Low supply voltage (1.6 – 2.0 V) with external voltage regulator • Programmable output power This document contains information on a pre-production product. Specifications and information herein are subject to change without notice. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF • Industrial Control • Home/building automation • ...

Page 2

... Buffered transmit mode___________________________________________________________35 Buffered receive mode ___________________________________________________________35 Un-buffered, serial mode__________________________________________________________35 Address Recognition ______________________________________________________________36 Acknowledge Frames _____________________________________________________________37 Radio control state machine ________________________________________________________39 MAC Security Operations (Encryption and Authentication) _____________________________41 Keys__________________________________________________________________________41 Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF CC2420 Page ...

Page 3

... Package Description (QLP 48) ______________________________________________________81 Package thermal properties ________________________________________________________82 Soldering information ____________________________________________________________82 Plastic tube specification __________________________________________________________82 Carrier tape and reel specification ___________________________________________________82 Ordering Information _____________________________________________________________83 General Information ______________________________________________________________84 Address Information ______________________________________________________________85 Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF CC2420 Page ...

Page 4

... PLL - Phase Locked Loop PSDU - PHY Service Data Unit QLP - Quad Leadless Package RAM - Random Access Memory RBW - Resolution BandWidth RF - Radio Frequency RSSI - Receive Signal Strength Indicator RX - Receive Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF CC2420 Page ...

Page 5

... Commerce/N.I.S.T., November 20014. Available from the NIST website. http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf [3] R. Housley, D. Whiting, N. Ferguson, Counter with CBC-MAC (CCM), submitted to NIST, June 3, 2002. Available from the NIST website. http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF CC2420 Page ...

Page 6

... No external filters needed • Easy configuration interface • 4-wire SPI interface • Serial clock MHz Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF • 802.15.4 MAC hardware support: • Spread Automatic preamble generator • Synchronisation insertion/detection • ...

Page 7

... The absolute maximum ratings given above should under no circumstances be violated. Stress exceeding one or more of Caution! ESD sensitive Precaution should be used when handling the device in order to prevent permanent damage. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF Min. Max. Units −0.3 2.0 V − ...

Page 8

... Spurious emission 30 - 1000 MHz 1– 12.75 GHz 1.8 – 1.9 GHz 5.15 – 5.3 GHz Error Vector Magnitude (EVM) Optimum load impedance Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Min. Typ. Max. Unit −40 85 °C 2400 2483.5 MHz 250 250 ...

Page 9

... MHz channel spacing Blocking / Desensitisation 2000 MHz 2000 - 2399 MHz 2498 - 3000 MHz 3 – 12.75 GHz (*Out-of-band spurious response rejection) In-band spurious reception LO leakage Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Min. Typ. Max. Unit -90 -94 dBm 0 10 ...

Page 10

... IF Section Intermediate frequency (IF) Frequency Synthesizer Section Crystal oscillator frequency Crystal frequency accuracy requirement Crystal operation Crystal load capacitance Crystal ESR Crystal oscillator start-up time Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Min. Typ. Max. Unit −57 dBm −47 dBm ...

Page 11

... FIFO setup time FIFO hold time Serial interface pins (SCLK, SI, SO and CSn) timing specification Voltage Regulator Input Voltage Output Voltage Quiescent current Startup time Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Min. Typ. Max. Unit −109 dBc/Hz −117 dBc/Hz − ...

Page 12

... Idle mode (IDLE) Crystal oscillator on (XOSC_ON) Current Consumption, receive mode Current Consumption, transmit mode -25 dBm P = -15 dBm P = -10 dBm P = −5 dBm dBm Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Min. Typ. Max. Unit µA 100 µs 2 µ ...

Page 13

... Power (analog) AVDD_SW Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF CC2420 QLP48 7x7 CC2420 Pinout – Top View Pin Description Exposed die attach pad. Must be connected to solid ground plane Connection of guard ring for VCO (to AVDD) shielding 1 ...

Page 14

... Note that digital inputs SCLK, SI and CSn are high-impedance inputs (no internal pull-up) and should have external pull-ups if not driven high-impedance when CSn is high. External pull-up should be used prevent floating input at microcontroller, or the internal SO-pin pull-up should be enabled. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF Pin Description 1 ...

Page 15

... CRC is verified in hardware. RSSI and correlation values are appended to the frame. CCA is available on a pin in receive mode. Serial (unbuffered) data modes are also available for test purposes. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF AUTOMATIC GAIN CONTROL ADC ADC ...

Page 16

... XOSC16_Q1 XOSC16_Q2 provides the reference frequency for the synthesizer. A digital lock signal is available from the PLL. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF The digital baseband includes support for frame handling, address recognition, data buffering and MAC security. ...

Page 17

... DC bias. Figure 4 shows a typical application circuit with differential antenna. The dipole has a virtual ground point, hence Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF provided without degradation in antenna performance. A typical series inductor may be connected ...

Page 18

... Table 1. Overview of external components Antenna (50 Ohm) C61 L62 L61 C62 C71 L81 C81 Figure 3. Typical application circuit with discrete balun for single-ended operation Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF 3.3 V Power supply R451 C42 1 VCO_GUARD 2 AVDD_VCO 3 ...

Page 19

... Folded L61 dipole 7 antenna Figure 4. Typical application circuit with differential antenna (folded dipole) Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF 3.3 V Power supply R451 C42 VCO_GUARD AVDD_VCO AVDD_PRE AVDD_RF1 CC2420 GND QLP48 RF_P RF 7x7 TXRX_SWITCH ...

Page 20

... Monolithic/multilayer, 0402 R451 43 kΩ, 1%, 0402 XTAL 16 MHz crystal load (C ESR < 60 Ω Table 2. Bill of materials for the application circuits Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF Differential antenna 10 µF, 0.5Ω < ESR < 5Ω Not used Not used 5 ...

Page 21

... Quadrature Phase Shift Keying (O-QPSK) with half-sine chip shaping. This is equivalent to MSK modulation. Each chip Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF least significant byte is transmitted first, except for security related fields where the most significant byte it transmitted first. ...

Page 22

... RF output power Evaluation Software CC2420 Chipcon provides users of software program, SmartRF (Windows interface) which may be used for performance and functionality Figure 7. SmartRF Studio user interface Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF • ...

Page 23

... A5 is the most significant bit of the address and is sent first. The 16 data-bits are then transferred (D15:0), also MSB first. See Figure 8 for an illustration. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF CC2420 The configuration registers can also be read by the microcontroller via the same configuration interface ...

Page 24

... Table 4. SPI timing specification Status byte During transfer of the register access byte, command strobes, the first RAM address byte and data transfer to the TXFIFO, the CC2420 status byte is returned on the SO Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF ...

Page 25

... The command strobe register is accessed in the same way as for a register write operation, but no data is transferred. That Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF access. Description Reserved, ignore value Indicates whether the 16 MHz oscillator is running or not 0 : The 16 MHz crystal oscillator is not running ...

Page 26

... SCLK. They may however also be terminated with setting CSn high, if desirable, e.g. for reading only 8 bits from a configuration register. Figure 9. Configuration registers write and read operations via SPI Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF second address byte. RAM data read is ...

Page 27

... SO, as shown in Figure 8. This could be used to detect TXFIFO underflow (see section RF Data Buffering section on page 34) while writing data to the TXFIFO. Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Description Not used 16-bit Short address, used for address recognition. ...

Page 28

... Configuration interface CC2420 A to microcontroller interface example is shown in Figure 11. The microcontroller uses 4 I/O pins for the SPI configuration interface (SI, SO, SCLK and Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF terminated by setting CSn high ADDR DATA TXFIFO ADDR ...

Page 29

... This may be handled by using the FIFOP pin RXFIFO overflow The RXFIFO can only contain a maximum of 128 bytes at a given time. This may be Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF µC FIFO GIO0 FIFOP ...

Page 30

... In receive mode, the FIFOP pin can be used to interrupt the microcontroller when a threshold has been exceeded or a complete frame has been received. This Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF SFD Length MAC Protocol Data Unit (MPDU) with correct address ...

Page 31

... CC2420 has hardware support for parts of the IEEE 802.15.4 frame format. This section gives a brief summary to the IEEE Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF For debug purposes, the SFD and CCA pins can be used to monitor several status signals as selected by the IOCFG1 register ...

Page 32

... Figure 16 shows how the CC2420 synchronisation header relates to the IEEE 802.15.4 specification. The programmable preamble length only applies to transmission, it does not affect Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF (data frames, acknowledgment command frames) are included in [1]. ...

Page 33

... MAC payload byte as shown in Figure 15. The FCS is calculated over the MPDU, i.e. the length field is not part of the FCS. This field is automatically generated and verified by hardware when Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Synchronisation Header Preamble 0 ...

Page 34

... MDMCTRL1.TX_MODE control MDMCTRL1.RX_MODE Buffered mode (mode 0) will be used for Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF (used for LQI) and CRC OK/not OK. This is illustrated in Figure 19. The first FCS byte is replaced by the 8-bit RSSI value. See the RSSI section on page 45 for details ...

Page 35

... Writing to the TXFIFO after a frame has been transmitted will cause the TXFIFO to be automatically flushed before the new Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF byte is written. The only exception TXFIFO underflow has occurred, when a SFLUSHTX command strobe is required ...

Page 36

... PAN (0xFFFF). • short destination address is included in the frame, it shall Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF synchronisation is still performed by CC2420 . This means that the FIFOP clock pin will remain idle low until a start of frame delimiter has been detected. ...

Page 37

... This timing must be controlled by the microcontroller by issuing the SACK and SACKPEND command strobe 12 symbol periods before the following backoff-slot boundary, as illustrated in Figure 22. Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF avoid detecting false SFDs within the 802.15.4 frame. The MDMCTRL0 ...

Page 38

... Beacon network Non-beacon network Figure 22. Acknowledge frame timing Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF PPDU 12 symbol periods t 12 symbol periods <= ack PPDU Acknowledge symbol periods ack ® CC2420 Acknowledge < 32 symbol periods Page ...

Page 39

... Table 5). This status register can be polled when waiting for the oscillator to start. Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF For test purposes, ...

Page 40

... RX_WAIT [14] Automatic or manual acknowledge request TX_ACK_CALIBRATE 12 symbol periods later TX_ACK_PREAMBLE Figure 23. Radio control states Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Voltage Regulator Off VREG_EN set high Wait until voltage regulator has powered up Chip Reset (pin or register) SXOSCOFF IDLE ...

Page 41

... SEC_TXKEYSEL, SEC_RXKEYSEL SEC_SAKEYSEL control bits (SECCTRL0). Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF As can be seen from Table 6 on page 27, KEY0 is located from address 0x100 and KEY1 from address 0x130 way of establishing the keys used for encryption and authentication must be decided for each particular application ...

Page 42

... As with other MAC hardware support CC2420 within , in-line security operation relies on the length field in the PHY Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF The frame counter part of the nonce must be incremented for each new packet by software. 1 ...

Page 43

... TXFIFO is then encrypted as specified by [1]. The encryption module will encrypt all the plaintext currently available, and wait if not everything is Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF prebuffered. The encryption operation may also be started without any data in the TXFIFO at all, and data will be encrypted written to the TXFIFO ...

Page 44

... The only differences are from the requirements in [1] for CCM. Mode CCM CTR CBC Stand- alone Table 8. Security timing examples Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Timing Table 8 shows some examples of the time used by the security module for different operations. l(a) l(m) l(MIC) ...

Page 45

... The RSSI register value RSSI.RSSI_VAL can be referred to the power P at the RF pins by using the following equations: -100 -80 Figure 25. Typical RSSI value vs. input power Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF dynamic range by using an analog/digital feedback loop. The AGC characteristics are set through the AGCCTRL, AGCTST0, AGCTST1 and AGCTST2 registers ...

Page 46

... All 3 CCA modes specified by [1] are CC2420 implemented in . They are set in MDMCTRL0.CCA_MODE, as can be seen in the register description. The different modes are: Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF (LQI) As described sequence section on page 33, the average correlation value for the 8 first symbols is ...

Page 47

... MHz). PLL self-calibration The VCO's characteristics will vary with temperature, changes in supply voltages, and the desired operating frequency. Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF bit (see Table 5) may be used to detect the result of the CCA. set by IEEE 802 ...

Page 48

... Table 9. Output power settings and typical current consumption @ 2.45 GHz Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF The power amplifier can be operated in differential or single ended mode. In single Table 9 ended mode only the RF_P output pin is used. ...

Page 49

... Figure 26. Voltage regulator, simplified schematic Battery Monitor The on-chip battery monitor enables monitoring the unregulated voltage on the VREG_IN pin. It gives status information on the voltage being above or below a Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF available on simplified schematic regulator is shown in Figure 26. ...

Page 50

... The toggle voltage is given by: − 72 BATTMON_VO LTAGE = ⋅ toggle 27 Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF VREG_IN 1.25 V BATTMON.BATTMON_OK BATTMON.BATTMON_VOLTAGE[4:0] Alternatively, for a desired toggle voltage, BATTMON_VOLTAGE according to: BATTMON_VO LTAGE The voltage regulator must be enabled for at least measurement. After being enabled, the BATTMON_OK status bit need 2 µ ...

Page 51

... XOSC16_Q1 C391 C391 Figure 28. Crystal oscillator circuit Item 6 6.8 pF Table 10. Crystal oscillator component values Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF = reference C 381 The parasitic capacitance is constituted by other pin input capacitance and PCB stray capacitance. ...

Page 52

... An unmodulated carrier transmitted by MDMCTRL1.TX_MODE to 2, writing 0x1800 Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF If a single ended output is required (for a single ended connector or a single ended antenna), a balun should be used for optimum performance. The balun can be realized using discrete inductors and capacitors LTCC balun can be used ...

Page 53

... Since a synchronisation header (preamble and SFD) is transmitted in all TX modes, this test mode may also be used to transmit a known pseudorandom Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF RBW 10 kHz VBW 10 kHz SWT 50 ms 200 kHz/ Figure 29 ...

Page 54

... Center 2.45 GHz Date: 23.OCT.2003 21:34:19 Figure 30. Modulated spectrum plot Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF RBW 100 kHz RF Att VBW 100 kHz SWT 5 ms Unit 1 MHz/ CC2420 30 dB dBm A 1SA Span 10 MHz ...

Page 55

... MHz bands defined by [1], where only 20 / CC2420 40 kbps are available. powered up a smaller portion of the time, so that the average power consumption is Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF reduced for a given amount of data to be transferred. Crystal accuracy and drift A crystal accuracy of ± ...

Page 56

... CC2420 by . Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF • When operating at or below the sensitivity limit, symbol synchronisation in infinite receive mode. A new SFD and ...

Page 57

... The length of the λ/2-dipole antenna is given by 14250 / f Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF If using MSK, the chip sequence must be modified such that the modulated MSK signal has the same phase shifts as the O- ...

Page 58

... PCB. Enclosing the antenna in high dielectric constant material reduces the overall size Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF resonant of the antenna. Many vendors offer such antennas intended for PCB mounting. ...

Page 59

... SACK 0x0B S SACKPEND 0x0C S SRXDEC Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF are 33 normal 16-bits registers, also listed is done by in Table 11. Many of these registers are for test purposes only, and need not be accessed for normal operation of The FIFOs are accessed through two 8-bit registers, TXFIFO and RXFIFO ...

Page 60

... TOPTST 0x30 R/W RESERVED 0x31- 0x3D - - Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF Description Start TXFIFO in-line encryption / authentication (as set by SPI_SEC_MODE), without starting TX. AES Stand alone encryption strobe. SPI_SEC_MODE is not required but the encryption module must be idle. If not, the strobe is ignored ...

Page 61

... ENC_RESETn 13 DEMOD_RESETn 12 MOD_RESETn 11 FS_RESETn 10 XOSC16M_BYPASS Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Description Transmit FIFO Byte Register Receiver FIFO Byte Register Reset R/W Description Active low reset of entire circuit, should be applied before doing 1 R/W anything else. Equivalent to using the RESETn reset pin. ...

Page 62

... ADR_DECODE 10:8 CCA_HYST[2:0] 7:6 CCA_MODE[1:0] 5 AUTOCRC 4 AUTOACK 3:0 PREAMBLE_LENGTH [3:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Mode for accepting reserved IEE 802.15.4 frame types when 0 R/W address recognition is enabled ( 0 : Reserved frame types (100, 101, 110, 111) are rejected by address recognition ...

Page 63

... TX_MODE[1:0] 1:0 RX_MODE[1:0] RSSI (0x13) - RSSI and CCA Status and Control Register Bit Field Name 15:8 CCA_THR[7:0] 7:0 RSSI_VAL[7:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Demodulator correlator threshold value, required before SFD 0 R/W search. Should always be set to 20. ...

Page 64

... TXMIX_CAP_ARRAY[1:0] 10:9 TXMIX_CURRENT[1:0] 8:6 PA_CURRENT[2:0] 5 PA_DIFF 4:0 PA_LEVEL[4:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Synchronisation word. The SYNCWORD is processed from the 0xA70F R/W least significant nibble (F at reset) to the most significant nibble (A at reset). SYNCWORD is used both during modulation (where 0xF’s are replaced with 0x0’ ...

Page 65

... Field Name 15:14 - 13:12 RXMIXBUF_CUR[1:0] 11:10 HIGH_LNA_GAIN[1:0] 9:8 MED_LNA_GAIN[1:0] 7:6 LOW_LNA_GAIN[1:0] 5:4 HIGH_LNA_CURRENT[1:0] 3:2 MED_LNA_CURRENT[1:0] 1:0 LOW_LNA_CURRENT[1:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write mixer buffer bias current. 1 R/W 0: 690uA 1: 980uA (nominal) 2: 1.16mA 3: 1.44mA Controls current in the LNA gain compensation branch in AGC 0 R/W High gain mode ...

Page 66

... LOW_LOWGAIN 10 MED_LOWGAIN 9 HIGH_HGM 8 MED_HGM 7:6 LNA_CAP_ARRAY[1:0] 5:4 RXMIX_TAIL[1:0] 3:2 RXMIX_VCM[1:0] 1:0 RXMIX_CURRENT[1:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Controls reference bias current to RX bandpass filters (Default Controls reference bias current to RX bandpass filters: 0 ...

Page 67

... Field Name 15:14 LOCK_THR[1:0] 13 CAL_DONE 12 CAL_RUNNING 11 LOCK_LENGTH 10 LOCK_STATUS 9:0 FREQ[9:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Number of consecutive reference clock periods with successful 1 R/W synchronisation windows required to indicate lock 128 (recommended) 2: 256 3: 512 Calibration has been performed since the last time the frequency ...

Page 68

... SEC_CBC_HEAD 7 SEC_SAKEYSEL 6 SEC_TXKEYSEL 5 SEC_RXKEYSEL 4:2 SEC_M[2:0] 1:0 SEC_MODE[1:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Protection enable of the RXFIFO, see description in the RXFIFO 1 R/W overflow section on page 29. Should be cleared if MAC level security is not used or is implemented outside CC2420. ...

Page 69

... BATTMON (0x1B) – Battery Monitor Control register Bit Field Name 15 BATT_OK 5 BATTMON_EN 4:0 BATTMON_VOLTAGE [4:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Multi-purpose length byte for TX in-line security operations: 0 R/W CTR : Number of cleartext bytes between length byte and the ...

Page 70

... HSSD_SRC[2:0] 9:5 SFDMUX[4:0] 4:0 CCAMUX[4:0] MANFIDL (0x1E) - Manufacturer ID, Lower 16 Bit Bit Field Name 15:12 PARTNUM[3:0] 11:0 MANFID[11:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Reserved, write R/W Polarity of the output signal FIFO Polarity is as described in the specification 1 : Polarity is inverted as compared to the specification Polarity of the output signal FIFOP ...

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... FSMTC (0x20) - Finite state machine time constants Bit Field Name 15:13 TC_RXCHAIN2RX[2:0] 12:10 TC_SWITCH2TX[2:0] 9:6 TC_PAON2TX[3:0] 5:3 TC_TXEND2SWITCH[2:0] 2:0 TC_TXEND2PAOFF[2:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Version number. Current number The device part number. CC2420 has part number 0x002 Reset R/W ...

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... Writing 0xFFFE to MANAND and 0x0000 to MANOR will force LNAMIX_PD≡0 whereas all other signals will be unaffected. • Writing 0xFFFF to MANAND and 0x0001 to MANOVR will force LNAMIX_PD≡1 whereas all other signals will be unaffected. Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF 1 Reset R/W ...

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... VGA_GAIN_OE 10:4 VGA_GAIN [6:0] 3:2 LNAMIX_GAINMODE_O [1:0] 1:0 LNAMIX_GAINMODE [1:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description The VGA_RESET_N signal is used to reset the peak detectors in 0 R/W the VGA in the RX chain. Global Bias power down (1) 0 R/W The BALUN_CTRL signal controls whether the PA should receive ...

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... AGC_REF[5:0] AGCTST2 (0x26) - AGC Test Register 2 Bit Field Name 15:10 - 9:5 MED2HIGHGAIN[4:0] 4:0 LOW2MEDGAIN[4:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Hysteresis on the switching between different RF frontend gain 3 R/W modes, defined steps Threshold for switching between medium and high RF frontend ...

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... Bit Field Name 15 - 14:13 VCO_CURCAL_SPEED[1:0] 12 VCO_CURRENT_OE 11:6 VCO_CURRENT_O[5:0] 5:0 VCO_CURRENT_RES[5:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write When '1' this control bit doubles the time allowed for VCO 0 R/W settling during VCO calibration. VCO array manual override enable. ...

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... RXBPF_CAP_O[6:0] 6:0 RXBPF_CAP_RES[6:0] FSMSTATE (0x2C) - Finite state machine information Bit Field Name 15:6 - 5:0 FSM_CUR_STATE[5:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Disable charge pump during VCO calibration when set. 1 R/W Charge pump current override enable 0 R Charge pump current set by calibration 1 : Charge pump current set by START_CHP_CURRENT Forces the CHP to output " ...

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... DACTST (0x2E) - DAC Test Register Bit Field Name 15 - 14:12 DAC_SRC[2:0] 11:6 DAC_I_O[5:0] 5:0 DAC_Q_O[5:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description ADC Clock Disable 0 R Clock enabled when ADC enabled 1 : Clock disabled, even if ADC is enabled Read the current ADC I-branch value. ...

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... TXFIFO (0x3E) – Transmit FIFO Byte register Bit Field Name 7:0 TXFIFO[7:0] RXFIFO (0x3F) – Receive FIFO Byte register Bit Field Name 7:0 RXFIFO[7:0] Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Reset R/W Description Reserved, write Enable BIST of the RAM 0 ...

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... WINDOW_SYNC 29 CLK_ADC 30 ZERO 31 ONE Table 12. SFD test signal select table Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF IOCFG1.CCAMUX. This is summarized in Table 12 and Table 13 below. and Description Normal operation ADC, Q-branch, LSB used for random number generation High one 16 MHz clock cycle each time the demodulator resynchronises late Lock status, same as FSCTRL ...

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... CLK_ADC_DIG 30 ZERO 31 ONE Table 13. CCA test signal select table Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 ® SmartRF Description Normal operation ADC, I-branch, LSB used for random number generation High one 16 MHz clock cycle each time the demodulator resynchronises early Lock status, same as FSCTRL ...

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... Package Description (QLP 48) Note: The figure is an illustration only and not to scale. Quad Leadless Package (QLP) D QLP 48 Min 6.9 7.0 Max 7.1 All dimensions in mm The package is compliant to JEDEC standard MO-220. Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF 6.65 6.9 6.65 0.18 6.75 7.0 6.75 0.5 6.85 7.1 6.85 0.30 ® CC2420 ...

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... Carrier tape and reel specification Carrier tape and reel is in accordance with EIA Specification 481. Tape and Reel Specification Package Tape Width QLP Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Thermal resistance Air velocity [m/s] 0 Rth,j-a [K/W] 25.6 Tube Height Tube Length 2 ...

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... Description CC2420 Single Chip RF Transceiver CC2420/T&R Single Chip RF Transceiver CC2420 CC2420DK CC2420 CC2420DBK CC2420 CC2420SK Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Development Kit Demonstration Board Kit Sample Kit (5 pcs) ® CC2420 MOQ 43 (tube) 4000 (tape and reel) 1 ...

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... Chipcon AS customers using or selling these products for use in such applications their own risk and agree to fully indemnify Chipcon AS for any damages resulting from any improper use or sale. © 2003, Chipcon AS. All rights reserved. Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF Product Status Definition ...

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... Samsung-dong, Kangnam-ku Seoul 135-798 Korea Tel: +82 2 6001 3888 Fax: +82 2 6001 3711 Email: Asiasales@chipcon.com Chipcon ISO 9001:2000 certified company Chipcon AS SmartRF ® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17 SmartRF http://www.chipcon.com wireless@chipcon.com support@chipcon.com + Chipcon Inc., Eastern US Sales Office ...

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