A43E06321 AMIC Technology, Corp., A43E06321 Datasheet - Page 16
A43E06321
Manufacturer Part Number
A43E06321
Description
512k x 32-Bit x 2 Banks Low Power Synchronous Dram
Manufacturer
AMIC Technology, Corp.
Datasheet
1.A43E06321.pdf
(46 pages)
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3. CAS Interrupt (I)
Note : 1. By “Interrupt”, It is possible to stop burst read/write by external command before the end of burst.
PRELIMINARY
DQ(CL2)
DQ(CL3)
CMD
CMD
ADD
ADD
2. t
3. t
CLK
CLK
DQ
By “
CCD
CDL
1) Read interrupted by Read (BL=4)
2) Write interrupted by Write (BL =2)
CAS
: Last data in to new column address delay. (= 1CLK).
:
CAS
DA0
RD
(July, 2005, Version 0.0)
WR
A
A
Interrupt”, to stop burst read/write by
Note2
Note3
t
t
t
CCD
CCD
CDL
to
DB0
CAS
WR
RD
B
B
Note2
QA0
DB1
delay. (=1CLK)
QB0
QA0
QB0 QB1
QB1 QB2
Note 1
QB3
QB2 QB3
CAS
15
access; read, write and block write.
DQ(CL2)
DQ(CL3)
3) Write interrupted by Read (BL =2)
WR
DA0
DA0
A
Note3
t
t
CCD
CDL
RD
B
AMIC Technology, Corp.
Note2
QB0
QB0
A43E06321
QB1
QB1
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