A43E06321 AMIC Technology, Corp., A43E06321 Datasheet - Page 18

• Manufacturer Part Number: A43E06321
• Description: 512k x 32-Bit x 2 Banks Low Power Synchronous Dram
• Manufacturer: AMIC Technology, Corp.

5. Write Interrupted by Precharge & DQM
Note : 1. To inhibit invalid write, DQM should be issued.
6. Precharge
7. Auto Precharge
PRELIMINARY
* Note : 1. The row active command of the precharge bank can be issued after t
2. This precharge command and burst write command should be of the same bank, otherwise it is not precharge
interrupt but only another bank precharge of dual banks operation.
DQ(CL2)
DQ(CL3)
DQ(CL2)
DQ(CL3)
1) Normal Write (BL=4)
1) Normal Write (BL=4)
2) Read (BL=4)
2) Read (BL=4)
The new read/write command of other active bank can be issued from this point.
At burst read/write with auto precharge,
DQM
CMD
CLK
CMD
DQ
CMD
CMD
CMD
CLK
CLK
DQ
DQ
CLK
CLK
(July, 2005, Version 0.0)
WR
D0
WR
WR
D0
D0
RD
RD
D1
D1
D1
Masked by DQM
D2
D2
D2
Q0
Q0
PRE
D3
D3
D3
Q0
Q0
Q1
Q1
Note 2
Note 1
Auto Precharge Starts
Auto Precharge Starts
t
PRE
Q1
Q1
RDL
Q2
Q2
CAS
PRE
Q2
Q2
Q3
Q3
Note 1
interrupt of the same/another bank is illegal.
17
Note 1
Q3
Q3
RP
from this point.
AMIC Technology, Corp.
A43E06321