A45L9332AE-6 AMIC Technology, Corp., A45L9332AE-6 Datasheet - Page 23

• Manufacturer Part Number: A45L9332AE-6
• Description: 256K x 32 Bit x 2 Banks Synchronous Graphic RAM
• Manufacturer: AMIC Technology, Corp.

5. Write Interrupted by Precharge & DQM
Note : 1. To inhibit invalid write, DQM should be issued.
6. Precharge
7. Auto Precharge
PRELIMINARY
* Note : 1. t
2. This precharge command and burst write command should be of the same bank, otherwise it is not precharge
interrupt but only another bank precharge of dual banks operation.
DQ(CL2)
DQ(CL3)
DQ(CL2)
DQ(CL3)
2. Number of valid output data after Row Precharge : 1,2 for CAS Latency = 2,3 respectively.
3. The row active command of the precharge bank can be issued after tRP from this point.
1) Normal Write (BL=4)
1) Normal Write (BL=4)
3) Read (BL=4)
3) Read (BL=4)
The new read/write command of other active bank can be issued from this point.
At burst read/write with auto precharge,
DQM
CMD
BPL
CLK
DQ
CMD
CMD
CMD
CMD
CLK
CLK
DQ
DQ
CLK
CLK
(October, 2001, Version 0.1)
: Block write data-in to PRE command delay.
WR
D0
WR
WR
D0
D0
RD
RD
D1
D1
D1
D2
D2
D2
Q0
Q0
D3
D3
D3
Q0
Q0
Q1
Q1
Masked by DQM
Note 1
Auto Precharge Starts
Auto Precharge Starts
PRE
t
Note 1
RDL
PRE
Q1
Q1
Q2
Q2
CAS
Note 2
PRE
Q2
Q2
Q3
Q3
Note 3
interrupt of the same/another bank is illegal.
22
Note 3
1
Note 2
Q3
Q3
(CL 2,3)
2) Block Write
2) Block Write
2
CMD
CMD
CLK
CLK
DQ
DQ
Pixel
BW
Auto Precharge Starts
Pixel
AMIC Technology, Inc.
BW
t
BPL
A45L9332A Series
t
Note 1
BPL
Note 3
PRE
t
RP