PM5352 PMC-Sierra, Inc., PM5352 Datasheet - Page 38

• Manufacturer Part Number: PM5352
• Description: SATURN USER NETWORK INTERFACE 155 (STAR)
• Manufacturer: PMC-Sierra, Inc.

DATA SHEET
PMC-1990421
6.4 Microprocessor Interface Signals
Pin Name
PHY_OEN
Pin Name
CSB
RDB
WRB
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
(ATM/
POS)
Input
Type
Type
Input
Input
Input
ISSUE 2
Pin
No.
A19
Pin
No.
B11
D11
A10
Function
The PHY Output Enable (PHY_OEN) signal
controls the operation of the system interface.
When set to logic zero, all System Interface outputs
are held tristate. When PHY_OEN is set to logic
one, the interface is enabled. PHY_OEN can be
overwritten by the PHY_EN Master System
Interface Configuration register bit. PHY_OEN and
PHY_EN are OR’ed together to enable the
interface.
When the S/UNI-STAR is the only PHY layer device
on the bus, PHY_OEN can safely be tied to logic
one. When the S/UNI-STAR shares the bus with
other devices, then PHY_OEN must be tied to logic
zero, and the PHY_EN register bit used to enable
the bus once its PHY_ADR[2:0] is programmed in
order to avoid conflicts.
Function
The active-low chip select (CSB) signal is low
during S/UNI-STAR register accesses.
Note that when not being used, CSB must be tied
high. If CSB is not required (i.e., registers accesses
are controlled using the RDB and WRB signals
only), CSB must be connected to an inverted
version of the RSTB input.
The active-low read enable (RDB) signal is low
during S/UNI-STAR register read accesses. The
S/UNI-STAR drives the D[7:0] bus with the contents
of the addressed register while RDB and CSB are
low.
The active-low write strobe (WRB) signal is low
during a S/UNI-STAR register write accesses. The
D[7:0] bus contents are clocked into the addressed
register on the rising WRB edge while CSB is low.
SATURN USER NETWORK INTERFACE 155 (STAR)
PM5352 S/UNI STAR
34