S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 36
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S1D13705
Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13705.pdf
(480 pages)
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7.1.3 Motorola MC68K #1 Interface Timing
S1D13705
X27A-A-001-09
UDS#, LDS#
Symbol
T
f
CLK
t10
t11
t12
DTACK#
CLK
t1
t2
t3
t4
t5
t6
t7
t8
t9
D[15:0]
D[15:0]
A[16:1]
(read)
(write
R/W#
CLK
AS#
CS#
Bus Clock Frequency
Bus Clock period
A[16:1], CS# valid before AS# falling edge
A[16:1], CS# hold from AS# rising edge
AS# low to DTACK# driven high
CLK to DTACK# low
CLK to AS#, UDS#, LDS# high
AS# high to DTACK# high
AS# high to DTACK# high impedance
UDS#, LDS# falling edge to D[15:0] valid (write cycle)
D[15:0] hold from AS# rising edge (write cycle)
UDS#, LDS# falling edge to D[15:0] driven (read cycle)
D[15:0] valid to DTACK# falling edge (read cycle)
UDS#, LDS# rising edge to D[15:0] high impedance
Hi-Z
Note
INVALID
T
Hi-Z
CLK
CLK may be turned off (held low) between accesses - see Section 13.5, “Turning Off
BCLK Between Accesses” on page 83
t1
Table 7-3: MC68K #1 Bus Timing (MC68000)
Figure 7-3: MC68K #1 Bus Timing (MC68000)
t3
Hi-Z
Parameter
t10
t8
t4
VALID
t11
t5
VALID
VALID
1T
1/f
Min
0
0
0
0
CLK
CLK
Epson Research and Development
t9
t2
t12
t6
Hardware Functional Specification
t7
T
T
Max
33
16
15
20
15
10
CLK
CLK
Vancouver Design Center
Hi-Z
Issue Date: 01/05/22
Hi-Z
Hi-Z
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
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