STMPE1601 STMicroelectronics, STMPE1601 Datasheet

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STMPE1601

Manufacturer Part Number
STMPE1601
Description
16-bit Enhanced Port Expander With Keypad And Pwm Controller Xpander Logic
Manufacturer
STMicroelectronics
Datasheet

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Features
Table 1.
February 2008
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
16 GPIOs
(8 operate at core supply V
supply V
Operating voltage 1.8
Hardware keypad controller (8*8 matrix with 4
optional dedicated keys max)
Keypad controller capable of detecting key-
press in hibernation mode
4 basic PWM controller for LED brightness
control
Interrupt output (open drain) pin
Optional 32 kHz clock input
8-channel programmable level translator
Advanced power management system
Ultra-low standby-mode current
Package TFBGA25 (3 x 3 mm)
16-bit enhanced port expander with keypad and PWM controller
STMPE1601TBR
Order code
io
Device summary
)
3.3 V
CC
, 8 operate at IO
TFBGA25
Package
Rev 2
Description
The STMPE1601 is a GPIO (general purpose
input/output) port expander able to interface a
main digital ASIC via the two-line bidirectional bus
(I
in mobile multimedia platforms to solve the
problems of the limited number of GPIOs typically
available on the digital engine.
The STMPE1601 offers great flexibility, as each
I/O can be configured as input, output or specific
functions. The device is able to scan a keyboard,
also provides PWM outputs for brightness control
in backlight, and GPIO. This device has been
designed to include very low quiescent current,
and a wake-up feature for each I/O, to optimize
the power consumption of the IC.
Potential applications of the STMPE1601 include
portable media players, game consoles, mobile
and smart phones.
2
C). A separate GPIO expander IC is often used
TFBGA25
STMPE1601
Tape and reel
Xpander Logic
Packaging
Preliminary Data
www.st.com
1/60
60

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STMPE1601 Summary of contents

Page 1

... This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice operate Description The STMPE1601 is a GPIO (general purpose input/output) port expander able to interface a main digital ASIC via the two-line bidirectional bus 2 (I C). A separate GPIO expander IC is often used ...

Page 2

... Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 I2C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 Minimizing current drain on I2C address lines . . . . . . . . . . . . . . . . . . . . . 13 6.2 Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.3 Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.4 Acknowledge bit (ACK 6.5 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.6 Slave device address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.7 Memory addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.8 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.9 General call address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 System controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.1 States of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.2 Autosleep . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3 Keypress detect in the hibernate mode . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/60 STMPE1601 ...

Page 3

... STMPE1601 8 Clocking system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8.1 Clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8.2 Power mode programming sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9 Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9.1 Interrupt system register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9.1.1 9.2 Programming sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 10 GPIO controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 10.1 GPIO control registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 10.2 Hotkey feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10.2.1 10.2.2 10.3 Level translator feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 11 Basic PWM controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 11.1 Interrupt on basic PWM controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 11.2 Trigger feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 12 Keypad controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 12 ...

Page 4

... Block diagram 1 Block diagram Figure 1. STMPE1601 block diagram CLK_IN INT SCLK SDAT 4/60 Keypad controller Main FSM PWM GPIO control Interface POR STMPE1601 Keypad Output 0-7 MUX /GPIO 0-7 /PWM 0-3 Keypad Input 0-7 /ADDR 0-2 MUX /GPIO 8-15 GND1 GND2 CS00024 ...

Page 5

... STMPE1601 2 Pin settings 2.1 Pin connection Figure 2. Pin connection (bottom view) 2.2 Pin assignment and TFBGA ball location Table 2. Pin assignment Ball name TFBGA25 Name Type GPIO_0 I/O GPIO 0/ KP_X0/ PWM_0 GPIO_1 I/O GPIO 1/ KP_X1/ PWM_1 GPIO_2 ...

Page 6

... VCC - 1.8 3.3 V input for I − VIO - 1.8 3.3 V input for GPIO GND - GND - 2 3 GPIO_8 GPIO_7 GPIO_10 GPIO_6 GND GND GPIO_13 SCLK GPIO_15 SDATA STMPE1601 Description 2 C module and digital core 4 5 GPIO_5 GPIO_4 CLK_IN INT GPIO_3 VCC GPIO_1 GPIO_2 RESET_N GPIO_0 ...

Page 7

... STMPE1601 2.4 GPIO pin functions Table 4. GPIO pin functions Name GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 Primary Alternate function function 1 GPIO Keypad GPIO Keypad GPIO Keypad GPIO Keypad GPIO Keypad GPIO Keypad ...

Page 8

... Table 6. Thermal data Symbol Thermal resistance junction-ambient R thJA T Operating ambient temperature A T Operating junction temperature J 8/60 Parameter Supply voltage Input voltage on GPIO pin ESD protection on each GPIO pin Parameter STMPE1601 Value Unit 4 Min Typ Max Unit 100 °C/W - °C ...

Page 9

... STMPE1601 4 Electrical specification 4.1 DC electrical characteristics Table 7. DC electrical characteristics Symbol V 1.8 V supply voltage supply voltage IO I Active current CC I Sleep current SLEEP I Hibernate current HIBERNATE I Active current CC I Sleep current SLEEP I Hibernate current HIBERNATE Open drain output INT current 4.2 Input/Output DC electrical characteristics The 1 ...

Page 10

... Test Parameter conditions 1 1 STMPE1601 < 1.95 V) Value Min Typ Max 0.45 1.35 0.83 2.48 < 1.95 V) Value Min Typ Max 103.3 50 100 150 Unit Unit μA KΩ ...

Page 11

... STMPE1601 5 Register map All the registers have the size of 8-bit. For each of the module, their registers are residing within the given address range. Table 11. Register map summary table Address 0x00 – 0x07 Clock and power manager module 0x80 – 0x81 Interrupt controller 0x10 – ...

Page 12

... Start/Restart/Stop ● Address STMPE1601 devices via the I The address is selected by the state of 3 pins. The state of the pins is read upon reset and then the pins can be configured for normal operation. The pins have a pull-up or down to set the address. The I registers in the STMPE1601 ...

Page 13

... STMPE1601 6.1 Minimizing current drain on I The GPIOs 13-15 are used recommended for these address lines. In the case that these pins are driven to an opposite logic level during device operation, there would be a current drain of VIO/47K. This amounts to 70 μ μA at 1.8 V for each of the address lines. This is not a small current for portable devices ...

Page 14

... The slave device address 10-bit address, where the least significant 3-bit are programmable. These 3-bit values will be loaded in once upon reset and after that these 3 pins no longer be needed with the exception during General Call STMPE1601 devices can be connected on a single I 6 ...

Page 15

... STMPE1601 6.8 Operating modes Table 13. Operating modes Mode Read Write 2 Figure transaction One byte Read More than one byte Read One byte Write More than one byte Read Bytes Programming sequence START, Device address, R Register address to be read reSTART, Device address, R Data Read, STOP If no STOP is issued, the Data Read can be continuously performed ...

Page 16

... General call address A general call address is a transaction with the slave address of 0x00 and R When a general call address is made, STMPE1601 responds to this transaction with an acknowledgement and behaves as a slave-receiver mode. The meaning of a general call address is defined in the second byte sent by the master-transmitter. ...

Page 17

... STMPE1601 7 System controller The system controller is the heart of the STMPE1601. It contains the registers for power control, and the registers for chip identification. The system registers are: Table 15. System registers Address 0x80 0x81 0x02 0x03 CHIP_ID VERSION_ID ...

Page 18

... Writing a ‘0’ to this bit will gate off the clock to the Keypad Controller module, thus stopping its operation [0] EN_SPWM Writing a ‘0’ to this bit will gate off the clock to the Simple PWM Controller module, thus stopping its operation 18/60 System control register SLEEP EN_GPIO STMPE1601 RESERVED EN_KPC EN_SPWM ...

Page 19

... STMPE1601 SYS_CTRL_2 7 6 RESERVED R 0 Address: 0x03 Type: R/W Reset: 0x00 Description: System control register [7] RESERVED [6] RESERVED [5] RESERVED [4] VIO_OFF: Writing a ‘1’ to this bit is mandatory before shuting off the VIO supply while maintaining the VCC supply. This ensure that the level shifters for GPIOs 15-8 are properly powered down so as not to induce high current and also not to affect the integrity of any external signals that are on the bus where these GPIOs are connected ...

Page 20

... transaction SLEEP 32K: ON Valid Keypress RC: OFF detect 2 C transaction for the device) or Wakeup pin or Hotkey activity will 2 C will need to hold the SCLK till the RC4M clock is ready. Reset Set Disable_32K bit 2 C transaction HIBERNATE 32K: OFF RC: OFF STMPE1601 2 C ...

Page 21

... STMPE1601. This inactivity means there is no intended I example, if there is Ian STMPE1601 device will still be counting down for the auto-sleep. The STMPE1601 device resets the autosleep time-out counter only when it receives an I device itself. This autosleep feature is controlled by the SYS_CTRL_2 (system control register 2) ...

Page 22

... PWM and GPIO respectively in the operational mode. 8.1 Clock source By default, when the STMPE1601 powers up, it derives a 32 KHz clock from the internal RC oscillator for its operation external clock source is available, it must be configured to accept an external clock through the SYS_CTRL register. ...

Page 23

... STMPE1601 8.2 Power mode programming sequence To put the device in sleep mode, the following needs to be done by the host: – Write a '1' to bit 4 of the SYS_CTRL register. To wake up the device, the host is required to: – Assert a wakeup routine on the I device address and the Write bit. Subsequently, proceed with sending the Base Register address and continue with a normal I up upon receiving the correct device address and in Write direction ...

Page 24

... Interrupt system 9 Interrupt system The STMPE1601 uses a highly flexible interrupt system. It allows the host system to configure the type of system events that should result in an interrupt, and pinpoints the source of interrupt by status register. The INT pin can be configured as ACTIVE HIGH, or ACTIVE LOW. ...

Page 25

... STMPE1601 9.1.1 Interrupt latency When the generation of interrupts by the GPIO as input is enabled, the latency (time taken from actual transition at GPIO to time of INT pin assertion) is shown in the following table: Table 17. Interrupt latency State of operation INT_CTRL INT_CTRL_msb Address: ...

Page 26

... IE8: GPIO controller interrupt mask Writing a ‘1’ to the IE[x] bit enables the interruption to the host. 26/60 Interrupt enable mask register IE8 IE7 IE6 R/W R STMPE1601 INT_EN_MASK_lsb IE5 IE4 IE3 IE2 IE1 ...

Page 27

... STMPE1601 INT_STA ISR_msb Address: 0x14, 0x15 Type: R, R/W Reset: 0x00 Description: The interrupt status register monitors the status of the interruption from a particular interrupt source to the host. Regardless whether the INT_EN bits are enabled or not, the INT_STA bits are still updated. ...

Page 28

... Interrupt status GPIO register ISG11 ISG10 ISG9 ISG8 ISG7 STMPE1601 INT_EN_GPIO_MASK _lsb IEG6 IEG5 IEG4 IEG3 IEG2 INT_STA_GPIOR _lsb ISG6 ISG5 ...

Page 29

... STMPE1601 9.2 Programming sequence To configure and initialize the Interrupt Controller to allow interruption to host, observe the following steps: ● Set the INT_EN_MASK and INT_EN_GPIO_MASK registers to the desired values to enable the interrupt sources that are to be expected to receive from. ● Configure the output interrupt type and polarity and enable the global interrupt mask by writing to the INT_CTRL. ● ...

Page 30

... GPIO controller A total of 16 GPIOs are available in the STMPE1601 port expander IC. Most of the GPIOs are sharing physical pins with some alternate functions. The GPIO controller contains the registers that allow the host system to configure each of the pins into either a GPIO, or one of the alternate functions ...

Page 31

... STMPE1601 10.1 GPIO control registers A group of registers is used to control the exact function of each of the 16 GPIOs. All the GPIO registers are named as GPxxx_yyy, where: – Xxx represents the functional group – Yyy represents the byte position of the GPIO – Lsb registers control GPIO[7:0] – ...

Page 32

... The pin is configured into GPIO mode and as input pin. 2. The global interrupt mask bit is enabled. 3. The corresponding GPIO interrupt mask bit is enabled. 10.2.2 Minimum pulse width The minimum pulse width of the assertion of the Hotkey must be at least 62.5 us. Any pulse width less than the stated value may not be registered. 32/60 STMPE1601 ...

Page 33

... Level translator feature When enabled, the GPIO 0-7 bits are internally mapped to GPIO 8-15 bits. The STMPE1601 becomes an 8-channel level translator where each of the channels may have its direction set individually. As GPIO 0-7 operates from Vcc, and GPIO 8-15 operates from Vio, this allows the 2 groups of GPIO to work as a level translator. ...

Page 34

... Basic PWM controller 11 Basic PWM controller The advanced PWM allows complex brightness and blinking control of an LED. The Basic PWM Controller allows simpler brightness control and basic blinking patterns. STMPE1601 is fitted with 4 channel of basic PWM controller. Table 21. Basic PWM controller Address ...

Page 35

... STMPE1601 PWM_OFF_OUTPUT Address: 0x40 Type: R/W Reset: 0x00 Description: Set the output level when the PWM is disabled [7:0] OUT7~0: Default is ‘0’ 1: PWM channel outputs ‘1’ when disabled 0: PWM channel outputs ‘0’ when disabled CHANNEL_FUNCT_EN 7 6 ALT_3 ...

Page 36

... Auto-Reload [3] RELOAD [2:0] GS2:0: Trigger source select 000: GPIO-4 001: GPIO-5 010: GPIO-6 011: GPIO-7 100: GPIO-9 101: GPIO-10 110: GPIO-11 111: GPIO-12 36/60 PWM trigger register MODE GS2 STMPE1601 GS1 GS0 ARM ...

Page 37

... STMPE1601 PWM_n_SET n=0 Brightness R/W R Address: 0x50, 0x54, 0x58, 0x5C Type: RW Reset: 0x00 Description: PWM blinking control [7:4] BRIGTHNESS: Duty cycle of PWM output during period 0 0000: duty cycle ratio 1:15 ( 6.25%, minimum brightness) 0001: duty cycle ratio 2:14 (12.50%) 0010: duty cycle ratio 3:13 (18.75%) 0011: duty cycle ratio 4:12 (25.00%) 0100: duty cycle ratio 5:11 (31 ...

Page 38

... In WDT mode: Wait time In one-short mode: pulse width 0000 = 5 mS 0001 = 10 mS 0010 = 20 mS 0011 = 40 mS 0100 = 80 mS 0101 = 160 mS 0110 = 320 mS 0111 = 640 mS 1000 = 1280 mS 1001 = 2560 mS 1010 = 5120 mS 1011 = 10 S 1100 = 20 S 1101 = 40 S 1110 = 80 S 1111 = 160 S 38/60 STMPE1601 ...

Page 39

... STMPE1601 PWM_n_CTRL_n=0 Period Address: 0x51, 0x55, 0x59, 0x5D Type: R/W Reset: 0x00 Description: PWM blinking control register [7:6] Period 0: 1-4 time units of period 0 [5:4] Period 1: 0-3 time units of period 1 [3:2] Repetition: Number of repetition 0 for Infinite repetition [1] INT_EN: “0” to disable interrupt generation on completion of sequence “ ...

Page 40

... The basic PWM controller can be programmed to be controlled by an external “trigger” signal. This feature can be used to implement: ● One shot trigger circuit ● Watchdog timer A 120 μS pulse is generated at PWM output when the programmed timer has elapsed without getting any trigger for the trigger source. 40/60 STMPE1601 ...

Page 41

... STMPE1601 12 Keypad controller The keypad controller consists of: – 4 dedicated key controllers that support simultaneous dedicated key presses; – a keyscan controller and two normal key controllers that support a maximum key matrix with detection of three simultaneous key presses; – 8 special function key controllers that support simultaneous “special function” ...

Page 42

... The keypad controller supports the following types of keys: ● input * 8 output matrix keys ● special function keys ● dedicated keys Figure 9. Maximum configuration STMPE1601 Input 0-7 8*8 (64) Matrix Keys 8 Special Function Keys 0 Dedicated Keys 42/60 Matrix Keypad (8*8) Special Function Keys STMPE1601 ...

Page 43

... STMPE1601 Figure 10. Maximum configuration STMPE1601 Input 0-3 4*8 (32) Matrix Keys 4 Special Function Keys 4 Dedicated Keys Input 4-7 Dedicated Keys Keypad controller Matrix Keypad (4*8) Special Function Keys 43/60 ...

Page 44

... KPC_DATA_BYTE4 44/60 Description Keypad column scanning register Keypad row scanning register Keypad control register Keypad combination key mask 0 Keypad combination key mask 1 Keypad combination key mask 2 Keypad data register STMPE1601 Auto-increment (during sequential R/W) Yes Yes Yes Yes Yes Yes Yes Yes ...

Page 45

... STMPE1601 KPC_COL Address: 0x60 Type: R/W Reset: 0x00 Description: Keypad column scanning [7] INPUT COLUMN: 1: turn on scanning of column 7 0: turn off [6] INPUT COLUMN: 1: turn on scanning of column 6 0: turn off [5] INPUT COLUMN: 1: turn on scanning of column 5 0: turn off [4] INPUT COLUMN: 1: turn on scanning of column 4 ...

Page 46

... The scanning pulse width is 1x period of 32 kHz clock during sleep mode.) [5] HIB_WK enable the keypad wake-up from hibernate mode 0: to disable [4] - [3:0] RESERVED: 46/60 Keypad row MSB HIB_WK - R STMPE1601 RESERVED ...

Page 47

... STMPE1601 KPC_ROW_lsb 7 6 R/W R Address: 0x62 Type: Reset: 0x00 Description: Keypad row scanning register. [7:0] OUTPUT ROW ‘1’ to turn on scanning of the corresponding row; ‘0’ to turn off KPC_CTRL_msb 7 6 SCAN_COUNT_0 ~ Address: 0x63 Type: R/W Reset: 0x00 Description: Keypad control register. ...

Page 48

... Keypad controller KPC_CTRL_lsb 7 6 R/W R Address: 0x64 Type: R/W Reset: 0x00 Description: Keypad control register. [7:1] DB_6:1: 0-128 ms of de-bounce time [0] SCAN start scanning 0: to stop 48/60 Keypad controller control (LSB DB_0 ~ 5 R/W R/W R STMPE1601 SCAN R/W R/W R ...

Page 49

... STMPE1601 13 Data registers The KPC_DATA register contains three bytes of information. The first two bytes store the key coordinates and status of any two keys from the normal key matrix, while the third byte store the status of dedicated keys. KPC_DATA_BYTE0 7 6 UP/DOWN ...

Page 50

... Address: 0x69 Type: R Reset: 0xF8 Description: Keypad data register. [7] UP/DOWN: 0: key-down 1: key-up [6:3] R[3:0] Row number of key 2 (valid range: 0-7) 0x1111: No key [2:0] C[2:0}: Column number of key 1 (valid range: 0-7) 50/60 Keypad data byte STMPE1601 ...

Page 51

... STMPE1601 KPC_DATA_BYTE2 7 6 UP/DOWN Address: 0x6A Type: R Reset: 0xF8 Description: Keypad data register. [7] UP/DOWN: 0: key-down 1: key-up [6:3] R[3:0] Row number of key 3 (valid range 0x1111: No key [2:0] C[2:0}: column number of key 3 (valid range: 0 -7) Keypad data byte ...

Page 52

... Keypad data register. [7:4] RESERVED: [3:0] Dedicated key [3:0]: 0: key-down 1 key-up 52/60 Keypad data byte SF5 SF4 SF3 Keypad data byte STMPE1601 SF2 SF1 SF0 Dedicated Key ...

Page 53

... STMPE1601 14 Keypad combination key registers The 3 KPC mask registers contains the key combination to be used to wake up the KPC and send an interrupt to the host system. KPC_COMB_KEY_0 ACTIVE ACTIVE R/W R Address: 0x65, 0x66, 0x67 Type: R/W Reset: 0xF8 Description: Keypad combination key mask registers. ...

Page 54

... Ghost key handling The ghost key is an inherent in keypad matrix that is not equipped with a diode at each of the keys. While it is not possible to avoid ghost key occurrence, the STMPE1601 allows the detection of possible ghost keys by the capability of detecting 3 simultaneous key-presses in the key matrix. ...

Page 55

... STMPE1601 pressed down before the special function key. Hence, when a matrix is reported "key-down" and it is being held down while the corresponding special function is being pressed, a "no- key" status will be reported for the matrix key when the special function key is reported "key- down" ...

Page 56

... Miscellaneous features 15 Miscellaneous features 15.1 Reset The STMPE1601 is equipped with an internal POR circuit that holds the device in reset state, until the clock is steady and V the STMPE1601 by asserting the RESET_N pin. 15.2 Under voltage lockout The STMPE1601 is equipped with an internal UVLO (under voltage lockout) circuit that generates a RESET signal, when the main supply voltage falls below the allowed threshold ...

Page 57

... STMPE1601 16 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 58

... Figure 12. Tape and reel dimension Table 24. TFBGA25 tape and reel mechanical data Symbol 58/60 millimeters Min Typ Max 330 12.8 13.2 20.2 60 14.4 3.3 3.3 1.60 3.9 4.1 7.9 8.1 STMPE1601 inches Min Typ Max 12.992 0.504 0.519 0.795 2.362 0.567 0.130 0.130 0.063 0.153 0.161 0.311 0.319 ...

Page 59

... STMPE1601 17 Revision history Table 25. Document revision history Date 10-Jan-2008 15-Feb-2008 Revision 1 Initial release. Modified Figure 1 on page page 39 and Section 6.1: Minimizing current drain on I2C address 2 lines on page 13, updated page 9, minor text changes. Revision history Changes 4, added info on register Description: on Table 7: DC electrical characteristics on ...

Page 60

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 60/60 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com STMPE1601 ...

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