PIC16C770 Microchip Technology Inc., PIC16C770 Datasheet - Page 15

• Manufacturer Part Number: PIC16C770
• Description: 18/20-pin, 8-bit Cmos Microcontrollers With 10/12-bit A/d
• Manufacturer: Microchip Technology Inc.

TABLE 2-1:
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h-
11Fh
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh-
18Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ’0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
Address Name
Bank 2
2002 Microchip Technology Inc.
Bank 3
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(1,3)
(3)
(1,3)
(3)
2: Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
3: These registers can be addressed from any bank.
OPTION_REG
INDF
TMR0
PCL
STATUS
FSR
PORTB
PCLATH
INTCON
PMDATL
PMADRL
PMDATH
PMADRH
INDF
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
PMCON1
Shaded locations are unimplemented, read as ‘0’.
contents are transferred to the upper byte of the program counter.
—
—
—
—
—
—
—
—
—
—
PIC16C717/770/771 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Unimplemented
Program memory read data low
Program memory read address low
Unimplemented
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Reserved
RBPU
Bit 7
IRP
GIE
IRP
GIE
—
—
—
—
INTEDG
PEIE
PEIE
Bit 6
RP1
RP1
—
—
—
—
—
Program memory read data high
T0CS
Bit 5
T0IE
T0IE
RP0
RP0
—
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
Write Buffer for the upper 5 bits of the Program Counter
T0SE
INTE
INTE
Bit 4
TO
TO
—
—
Program memory read address high
RBIE
RBIE
Bit 3
PSA
PD
PD
—
PIC16C717/770/771
Bit 2
T0IF
PS2
T0IF
—
Z
Z
INTF
INTF
Bit 1
PS1
DC
DC
—
RBIF
RBIF
Bit 0
PS0
RD
C
C
DS41120B-page 13
xxxx xxxx
0001 1xxx
xxxx xxxx
xxxx xx11
---0 0000
0000 000x
xxxx xxxx
xxxx xxxx
--xx xxxx
---- xxxx
0000 0000
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
---0 0000
0000 000x
1--- ---0
0000 0000
0000 0000
Value on:
POR,
BOR
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