PIC16C770 Microchip Technology Inc., PIC16C770 Datasheet - Page 69

• Manufacturer Part Number: PIC16C770
• Description: 18/20-pin, 8-bit Cmos Microcontrollers With 10/12-bit A/d
• Manufacturer: Microchip Technology Inc.

REGISTER 9-2:
2002 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
SYNC SERIAL PORT CONTROL REGISTER (SSPCON: 14h)
WCOL: Write Collision Detect bit
Master Mode:
1 = A write to the SSPBUF register was attempted while the I
0 = No collision
Slave Mode:
1 = The SSPBUF register is written while it is still transmitting the previous word (must be
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI mode
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case
0 = No overflow
In I
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In both modes, when enabled, the I/O pins must be properly configured as input or output.
In SPI mode
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the serial port
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode
1 = IDLE state for clock is a high level
0 = IDLE state for clock is a low level
In I
1 = Enable clock
In I
Unused in this mode
bit 7
0 = Holds clock low (clock stretch) (used to ensure data setup time)
Legend:
R = Readable bit
- n = Value at POR
WCOL
R/W-0
2
2
2
2
transmission to be started
cleared in software)
of overflow, the data in SSPSR is lost. Overflow can only occur in Slave mode. In Slave
mode, the user must read the SSPBUF, even if only transmitting data, to avoid setting over-
flow. In Master mode, the overflow bit is not set since each new reception (and transmis-
sion) is initiated by writing to the SSPBUF register. (Must be cleared in software).
"don’t care" in Transmit mode. (Must be cleared in software).
pins
port pins
C mode
C mode
C Slave mode SCK release control
C Master mode
SSPOV
R/W-0
Advance Information
SSPEN
R/W-0
W = Writable bit
’1’ = Bit is set
R/W-0
CKP
PIC16C717/770/771
SSPM3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
2
SSPM2
R/W-0
C conditions were not valid for a
x = Bit is unknown
SSPM1
R/W-0
DS41120B-page 67
SSPM0
R/W-0
bit 0