PIC16F819 Microchip Technology Inc., PIC16F819 Datasheet - Page 23
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PIC16F819
Manufacturer Part Number
PIC16F819
Description
18/20-pin Enhanced Flash Microcontrollers With Nanowatt Technology
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F819.pdf
(176 pages)
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2.2.2.6
The PIE2 register contains the individual enable bit for
the EEPROM write operation interrupt.
REGISTER 2-6:
2.2.2.7
The PIR2 register contains the flag bit for the EEPROM
write operation interrupt.
REGISTER 2-7:
2004 Microchip Technology Inc.
bit 7-5
bit 4
bit 3-0
bit 7-5
bit 4
bit 3-0
PIE2 Register
PIR2 Register
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2 (ADDRESS 8Dh)
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2 (ADDRESS 0Dh)
bit 7
bit 7
Unimplemented: Read as ‘0’
EEIE: EEPROM Write Operation Interrupt Enable bit
1 = Enable EE write interrupt
0 = Disable EE write interrupt
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
Unimplemented: Read as ‘0’
EEIF: EEPROM Write Operation Interrupt Enable bit
1 = Enable EE write interrupt
0 = Disable EE write interrupt
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
U-0
U-0
—
—
U-0
U-0
—
—
U-0
U-0
—
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
EEIF
EEIE
.
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
Interrupt flag bits are set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the Global
Interrupt Enable bit, GIE (INTCON<7>).
User software should ensure the appropri-
ate interrupt flag bits are clear prior to
enabling an interrupt.
PIC16F818/819
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
U-0
U-0
—
—
DS39598E-page 21
U-0
U-0
—
—
bit 0
bit 0