MC145152-2 Freescale Semiconductor, Inc, MC145152-2 Datasheet - Page 22
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MC145152-2
Manufacturer Part Number
MC145152-2
Description
Parallel-input Pll Frequency Synthesizer
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC145152-2.pdf
(24 pages)
Design Considerations
For the maximum frequency into the prescaler (f
that:
A sometimes useful simplification in the programming code can be achieved by choosing the values for P
of 8, 16, 32, or 64. For these cases, the desired value of N
code to the ÷ N and ÷ A counters treated in the following manner:
By using the two devices, several dual-modulus values are achievable.
22
1. f
2. The period of f
1. Assume the ÷ A counter contains “a” bits where 2
2. Always program all higher order ÷ A counter bits above “a” to 0.
3. Assume the ÷ N counter and the ÷ A counter (with all the higher order bits above “a” ignored)
counters).
a) Propagation delay through the dual-modulus prescaler.
b) Prescaler setup or release time relative to its MC signal.
c) Propagation time from f
combined into a single binary counter of n + a bits in length (n = number of divider stages in the
÷ N counter). The MSB of this “hypothetical” counter is to correspond to the MSB of ÷ N and the
LSB is to correspond to the LSB of ÷ A. The system divide value, N
of N
VCOmax
T
in binary is used to program the “new” n + a bit counter.
divided by P may not exceed the frequency capability of f
VCO
divided by P must be greater than the sum of the times:
MC145151-2 and MC145152-2 Technical Data, Rev. 5
in
to the MC output for the frequency synthesizer device.
VCOmax
T
), the value used for P must be large enough such
results when N
a
≥ P.
T
in binary is used as the program
in
T
, now results when the value
(input to the ÷ N and ÷ A
Freescale Semiconductor