CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 38

• Manufacturer Part Number: CY82C693UB
• Description: Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
• Manufacturer: Cypress Semiconductor Corporation.

Register 2: Peripheral Configuration Register #2 (Read/Write)
Register 3: Interrupt Request Level/Edge Control Register #1 (Read/Write)
Bit
7:3
2
1
0
Bit
7
6
5
4
3
2:0
Function
Reserved
Peripheral Controller Test Mode Control:
0:
1:
Interrupt Request Configuration Control:
0:
1:
When this bit is set to 1, interrupt request inputs can be programmed (on an individual basis)
to be Edge-triggered (non-sharable) or Level-sensitive (sharable). The selection is made in
registers 3 and 4.
DMA Extended Mode Control
0:
1:
Function
IRQ7 Edge-Triggered/Level-Sensitive Selector:
0:
1:
IRQ6 Edge-Triggered/Level-Sensitive Selector:
0:
1:
IRQ5 Edge-Triggered/Level-Sensitive Selector:
0:
1:
IRQ4 Edge-Triggered/Level-Sensitive Selector:
0:
1:
IRQ3 Edge-Triggered/Level-Sensitive Selector:
0:
1:
Reserved
Normal Operation
Put Peripheral Controller Into Test Mode
Normal Operation
Enable Interrupt Request Level/Edge Control
Enable DMA Extended Mode
Disable DMA Extended Mode
Edge-Triggered
Level-Sensitive
Edge-Triggered
Level-Sensitive
Edge-Triggered
Level-Sensitive
Edge-Triggered
Level-Sensitive
Edge-Triggered
Level-Sensitive
PRELIMINARY
38
Index=02H
Index=03H
CY82C693UB
Default
000
0
0
0
Default
0
0
0
0
0
000