HT46R64 Holtek Semiconductor Inc., HT46R64 Datasheet - Page 21

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HT46R64

Manufacturer Part Number
HT46R64
Description
Ht46r64/ht46c64 -- A/d With Lcd Type 8-bit Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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PWM
The microcontroller provides 4 channels (6+2)/(7+1)
(dependent on options) bits PWM output shared with
PD0/PD1/PD2/PD3. The PWM channels have their data
registers denoted as PWM0 (1AH), PWM1 (1BH),
PWM2 (1CH) and PWM3 (1DH). The frequency source
of the PWM counter comes from f
ters are four 8-bit registers. The waveforms of PWM out-
puts are as shown. Once the PD0/PD1/PD2/PD3 are
selected as the PWM outputs and the output function of
PD0/PD1/PD2/PD3 are enabled (PDC.0/PDC.1/
PDC.2/PDC.3= 0 ), writing 1 to PD0/PD1/PD2/PD3
data register will enable the PWM output function and
writing 0 will force the PD0/PD1/PD2/PD3 to stay at
A (6+2) bits mode PWM cycle is divided into four modu-
lation cycles (modulation cycle 0~modulation cycle 3).
Each modulation cycle has 64 PWM input clock period.
Rev. 1.80
0 .
SYS
. The PWM regis-
(6+2) PWM Mode
(7+1) PWM Mode
21
In a (6+2) bit PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.2. The group 2 is denoted by AC which is
the value of PWM.1~PWM.0.
In a (6+2) bits mode PWM cycle, the duty cycle of each
modulation cycle is shown in the table.
A (7+1) bits mode PWM cycle is divided into two modu-
lation cycles (modulation cycle0~modulation cycle 1).
Each modulation cycle has 128 PWM input clock period.
Modulation cycle i
Parameter
(i=0~3)
HT46R64/HT46C64
AC (0~3)
i<AC
i AC
February 14, 2006
Duty Cycle
DC+1
DC
64
64

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