MR37V12841A Oki Semiconductor, MR37V12841A Datasheet

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MR37V12841A

Manufacturer Part Number
MR37V12841A
Description
128m 1?bit Serial Production Programmed Rom P2rom
Manufacturer
Oki Semiconductor
Datasheet

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Part Number:
MR37V12841A
Manufacturer:
OKI
Quantity:
5 000
Company:
Part Number:
MR37V12841A-108MP03B
Quantity:
476
GENERAL DESCRIPTION
134,217,728word  1-bit. The MR37V12841A supports a simple read operation using a single 3.3V power supply
and a Serial Peripheral Interface (SPI) compatible serial bus.
the programming function is NOT allowed )
FEATURES
·Read Operation
PACKAGES
· MR37V12841A-xxxMP
PIN DESCRIPTIONS
- +3.3 V power supply
- 134,217,728  1-bit
- Access time: 33MHz serial clock (FAST-READ)
-
- Read Identification Instruction
- Active read current: 30mA(FAST-READ)
-
- Standby current
- Serial Clock Input and Data Input/Output
- Input Data Format :
-
OKI Semiconductor
MR37V12841A
128M  1–Bit Serial Production Programmed ROM (P2ROM)
The MR37V12841A is a 128Mbit Production Programmed Read-Only Memory, which is configured as
The MR37V12841A have data programmed and have functions tested at OKI factory. (Using the DC pins for
16-pin plastic SOP (P-SOP16-375-1.27-K)
1-byte Command code, 3-byte address, 1-byte dummy
1-byte Command code, 3-byte address
(FAST-READ)
(READ)
Pin name
SCLK
GND
#CS
V
SO
DC
NC
SI
CC
20MHz serial clock (READ)
: 50 µA
20mA(READ)
Chip Select
Serial Data Input
Serial Data Output
Clock Input
Power supply voltage
Ground
Don’t care ( 0v - Vcc )
Non connection
<for reference> Program power supply voltage Vpp under Programming operation
Functions under Read Operation
FEDR37V12841A-02-01
Issue Date: Nov. 9, 2006
1/15

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MR37V12841A Summary of contents

Page 1

... The MR37V12841A supports a simple read operation using a single 3.3V power supply and a Serial Peripheral Interface (SPI) compatible serial bus. The MR37V12841A have data programmed and have functions tested at OKI factory. (Using the DC pins for the programming function is NOT allowed ) FEATURES · ...

Page 2

... A23 A22 AD2: A15 A14 AD3 Read Array (byte) 03[H] AD1 AD2 AD3 N byte read out until #CS goes high A21 A20 A19 A13 A12 A11 FEDR37V12841A-02-01 MR37V12841A / P2ROM Note A18 A17 A16 A10 2/15 ...

Page 3

... A22 AD2: A15 A14 AD3 Read Array (byte) 0B[H] AD1 AD2 AD3 X N byte read out until #CS goes high A21 A20 A19 A13 A12 A11 FEDR37V12841A-02-01 MR37V12841A / P2ROM Note A18 A17 A16 A10 3/15 ...

Page 4

... The 1 command 9F[ Read Identification command 2. Identification output Details of command and address are shown as follows. 1-byte command code RDID 1 0 IDENTIFICATION DEFINITION Manufacturer Identification AE[H] Read Array (byte) 9F[H] 3 byte read out Device Identification Type 41[H] FEDR37V12841A-02-01 MR37V12841A / P2ROM Note Capacity 16[H] 4/15 ...

Page 5

... FEDR37V12841A-02-01 MR37V12841A / P2ROM th code are address inputs code are address. The 5 code is a 5/15 ...

Page 6

... Condition 3 –0.5 Condition Min. — — — FEDR37V12841A-02-01 MR37V12841A / P2ROM Value –55 to 125 –0 +0.5 CC –0 +0.5 CC –0 1.0 10 Min. Typ. Max. — — 3.0 3.6 — 2.4 V +0.5 CC — ...

Page 7

... 20MHz IL CC1 SO= open # 33Hz IL F SO= open — — –100  500  FEDR37V12841A-02-01 MR37V12841A / P2ROM (V = 3.0V-3.6V 70°C) CC Min. Typ. Max. — — 10 — — 10 — — 50 — — 1 — — 20 — — 30 — ...

Page 8

... CSH — — — — — DOH — — t DOZ Output load Vcc/0v Output 2.4V/ 0. 0.5 Vcc FEDR37V12841A-02-01 MR37V12841A / P2ROM = 3.0V-3.6V 70°C) CC Max. Unit 33 * MHz — ns — — ns — ns — ns — ns — ns — ns — ns ...

Page 9

... Incorrect command makes this LSI become and keep standby mode until next #CS rising edge. In standby mode, SO pin is High- CYC t SKH SKL BIT 6 BIT 7 BIT DOH byte = incorrect code FEDR37V12841A-02-01 MR37V12841A / P2ROM t t CSH CSB BIT 0 BIT 0 t DOZ Standby 9/15 ...

Page 10

... Don’t Care BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT data output data output th N th byte. FEDR37V12841A-02-01 MR37V12841A / P2ROM BIT 7 BIT 6 BIT 5 BIT byte AD1 Hi-Z BIT 1 BIT 0 BIT 7 BIT data output BIT 3 BIT 2 BIT 1 BIT 0 data output (N+1) ...

Page 11

... Don’t Care BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT data output data output th N data output th byte. FEDR37V12841A-02-01 MR37V12841A / P2ROM BIT 7 BIT 6 BIT 5 BIT byte AD1 Hi-Z BIT 1 BIT 0 BIT 7 BIT data output BIT 3 BIT 2 BIT 1 BIT 0 th (N+1) BIT 3 ...

Page 12

... Input data are latched at SCLK-rising edge. 2. Data-output starts at SCLK-falling edge in bit0 of the byte Command Hi-Z Don’t Care BIT15 BIT14 BIT13 Device Identification st byte. FEDR37V12841A-02-01 MR37V12841A / P2ROM *note2 Don’t Care BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 Manufacturer Identification t CSB BIT 2 BIT 1 BIT 0 Hi-Z 12/15 ...

Page 13

... The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). FEDR37V12841A-02-01 MR37V12841A / P2ROM (Unit: mm) 13/15 ...

Page 14

... Semiconductor OKI REVISION HISTORY Document No. FEDR37V12841A-02-01 Page Date Previous Current Edition Edition – – Nov. 9, 2006 FEDR37V12841A-02-01 MR37V12841A / P2ROM Description Final edition 1 14/15 ...

Page 15

... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. FEDR37V12841A-02-01 MR37V12841A / P2ROM Copyright 2006 Oki Electric Industry Co., Ltd. 15/15 ...

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