CY24271 Cypress Semiconductor Corporation., CY24271 Datasheet - Page 10

• Manufacturer Part Number: CY24271
• Description: Rambus Xdr Clock Generator
• Manufacturer: Cypress Semiconductor Corporation.

Example External Resistor Values
and Termination Voltages for a 50Ω Channel
Signal Waveforms
A physical signal that appears at the pins of a device is deemed
valid or invalid depending on its voltage and timing relations with
other signals. Input and output voltage waveforms are defined as
shown in
Document Number: 001-00411 Rev. *B
Parameter
Figure
R
V
R
R
R
R
V
RC
TS
T
T
1
2
3
4. Both rise and fall times are defined between
CLKB
CLK
V
(t)
Value
2.5V
1.2V
39.2
66.5
93.1
49.9
200
Figure 4. Input and Output Waveforms
Figure 5. Crossing Point Voltage
Unit
Ω
Ω
Ω
Ω
Ω
V
V
t
F
the 20% and 80% points of the voltage swing, with the swing
defined as V
Figure 5
nominal crossing point between the complementary outputs is
defined as the 50% point of the DC voltage levels. There are two
crossing points defined: Vx+ at the rising edge of CLK and Vx–
at the falling edge of CLK. For some waveforms, both Vx+ and
Vx– are below Vx,nom (for example, if t
Jitter
This section defines the specifications that relate to timing uncer-
tainty (or jitter) of the input and output waveforms.
shows the definition of cycle-to-cycle jitter with respect to the
falling edge of the CLK signal. Cycle-to-cycle jitter is the
difference between cycle times of adjacent cycles. Equal require-
ments apply rising edges of the CLK signal.
definition
Cycle-to-cycle duty cycle is defined as the difference between
t
requirements apply to t
cycles.
PW+
(high times) of adjacent differential clock cycles. Equal
shows the definition of the output crossing point. The
t
R
of
H
–V
cycle-to-cycle
L
.
PW-
Vx+
Vx.nom
Vx-
, low times of the differential click
8 0 %
V
2 0 %
V
H
L
duty
cycle
CR
is larger than t
Figure 7
error
CY24271
Page 10 of 13
shows the
(t
Figure 6
DC,ERR
CF
).
).
[+] Feedback
[+] Feedback