SSD2119 Crystalfontz America, Inc.,, SSD2119 Datasheet - Page 2
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SSD2119
Manufacturer Part Number
SSD2119
Description
320 Rgb X 240 Tft Lcd Driver Integrated Power Circuit, Source And Gate Driver And Ram
Manufacturer
Crystalfontz America, Inc.,
Datasheet
1.SSD2119.pdf
(95 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSD2119
Manufacturer:
SOLOMON
Quantity:
20 000
Company:
Part Number:
SSD2119M1ZD
Manufacturer:
SOLOMON
Quantity:
4 730
Version
0.45
Solomon Systech
0.10
0.20
0.30
0.40
0.41
0.42
0.43
0.44
Change Items
1
P.76 Application Circuit updated
P.80 Figure 19-4 – ITO and FPC connection example added
P.26 Remove SPI Interface from CS
P.26 Add SCS for SPI Chip Select, CS/SCS – chip select pin for both parallel and serial
interface.
P.66 All Waveform pin name is updated
P.13 PadCo pin name of pad# 266 & 269 is updated
P.66 Figure 13.1, 13.2 13.3 are updated.
P.10 Alignment Mark Updated base on padco v4.0
–
P.265 Padco updated to v5.0 on Table 5-2
P.63 Test condition (Booster Ratio) added for I
P.72 Table 15-1 is updated to 1000 18-bit 6800
P.1-80 “CONFIDENTIAL” water mark being removed.
P.267 Pin name updated for pin 308 to 327
P.62 Operating Temperature update to -40 to +85
12(page 13).
P.10 Die Size(No Scribe) updated to 23724 x 780 um
P.10 Die Thickness updated to 400 ± 25 um
P.80 Figure 19-4 Pin 229 to Pin 242 Updated
P.32 R01h, R44h, R45h, R46h, R48h, R49h, R4Ah, R4Bh, R4Eh, R4Fh Command Updated
P.27 D9-D16 is used for RGB, D12 short to D17 for 65K color
P64-66 Updated AC Timing Diagrams
P.49 Updated OTP programming sequence
P.52 Updated RAM address set (R4Eh-R4Fh) Swapped X and Y position
P. 28-29 Updated SPI interface
P.74 Updated SPI bit mapping
P.52 Updated OTP
P.68 Updated Tas and Tah definition
P.32 Updated R11h POR to 6230h
P.41 Updated R03h POR to 6ª64h
P.45 Updated Frame Frequency formula
P.50 Updated diagram address to 13F, EFH.
P.56 Updated Conditions to HEA[8:0]<= 13FH, VEA[7:0]<=EFH .
P.56-58 Updated all VEA to [7:0] and all HEA to [8:0]
P.67-68 Updated (Tcycle = Min. 100ns, PWcsl = PWcsh = Min. 50ns)
to Tcycle = Min. 75ns, PWcsl = Min.40ns PWcsh = Min. 25ns
added Note: CS can be pulled low during the write cycle, only /RW is needed to be toggled
P.70-71 Added RGB Timing
P.36 Change GS to TB
P.12 Change OE to DEN in table 5-2
P.12 Remove G0 in table 5-2
P.65-70 Corrected VDDIO from 1.65V to 1.4V
P.76 Added Mapping for Writing Pixel Data in SPI mode
P.70 Updated RGB Timing Characteristics
P.62 Updated Gama Ladder Resistor table format
P.12-22, 36, 59-60, 80, 84 Fixed format of Table 5-2, TB Table, Grayscale Amplifier, Power
supply block diagram and Figure 19-4
st
Release
IC Revision history of SSD2119 Specification
1010 18-bit 8080
1001 9-bit 6800
1011 9-bit 8080
dp
(8 color) on page 13
o
C for Section 11(page 13) and Section
2
Jun 2009
P 2/95
Rev 1.4
SSD2119
Effective
Date
06-Mar-08
18-Mar-08
08-Aug-08
19-Aug-08
17-Apr-08
26-Feb-08
31-Jan-08
20-Aug-08
23-Jul-08