BS2824 Holtek Semiconductor Inc., BS2824 Datasheet - Page 54
BS2824
Manufacturer Part Number
BS2824
Description
Touch Key Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
1.BS2824.pdf
(92 pages)
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BS2824/BS2854/BS2868
Touch Key MCU
Rev. 1.00
Timer Mode
TMR1C Register
Control Register Operating Mode
Select Bits for the Timer Mode
In this mode, the Timer/Event Counter can be utilised to measure fixed time intervals, providing an
internal interrupt signal each time the Timer/Event Counter overflows. To operate in this mode, the
Operating Mode Select bit pair, TnM1/TnM0, in the Timer Control Register must be set to the
correct value as shown.
In this mode the internal clock is used as the timer clock. The timer input clock source is either f
f
value of which is determined by the bits T0PSC2~T0PSC0 in the Timer Control Register. The
timer-on bit, TnON must be set high to enable the timer to run. Each time an internal clock high to
low transition occurs, the timer increments by one; when the timer is full and overflows, an interrupt
signal is generated and the timer will reload the value already loaded into the preload register and
continue counting. A timer overflow condition and corresponding internal interrupt is one of the
wake-up sources, however, the internal interrupts can be disabled by ensuring that the ETnI bits of
the INTCn register are reset to zero.
SYS
Bit 7,6
Bit 5
Bit 4
Bit 3
Bit 2~0
Name
POR
R/W
/4 or the LXT oscillator. However, this timer clock source is further divided by a prescaler, the
Bit
T1M1, T1M0: Timer 1 Operation mode selection
T1S: timer clock source
T1ON: Timer/event counter counting enable
T1EG:
Event counter active edge selection
Pulse Width Capture active edge selection
unimplemented, read as 0
T1M1
00: no mode available
01: event counter mode
10: timer mode
11: pulse width capture mode
0: f
1: LXT oscillator
0: disable
1: enable
0: count on raising edge
1: count on falling edge
0: start counting on falling edge, stop on rasing edge
1: start counting on raising edge, stop on falling edge
R/W
7
0
SYS
/4
T1M0
R/W
6
0
Timer Mode Timing Chart
R/W
T1S
5
0
54
T1ON
R/W
4
0
Bit7
T1EG
1
R/W
3
1
Bit6
0
2
1
January 27, 2010
0
SYS
,
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