T81L0006B TM Technology Inc., T81L0006B Datasheet - Page 20

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T81L0006B

Manufacturer Part Number
T81L0006B
Description
8-bit A/d Type Mcu
Manufacturer
TM Technology Inc.
Datasheet
tm
10.7 EEPROM Interface
SPICON:
OPCODE
TM Technology Inc. reserves the right
WRALL (Write All Registers)
to change products or specifications without notice.
MSB
MSB
Bit 7
Bit 7
WEN (Write Enable)
WDS (Write Disable)
The EEPROM interface timing is fully compatible with 93C46. To access or send data from/to T81L0006B , 6 registers
are going to be controlled.
EEPROM Register Control
Epst: start EEPROM timing. “1” to start and will be auto cleared after timing finish.
Epdiv[1..0]: divide input clock into EEPROM system clock.
DATAW_H
DATAW_L
DATAW_L
DATAR_H
Instruction Set
OPCODE
SPICON
OP Code
ERAL
Write
Erase
Read
CH
TE
10: divide by 64
01: divide by 32
else: divide by 16
Bit 6
Bit 6
Default
00H
00H
00H
00H
Bit5
Bit5
--
--
-
(for T81L0006B only)
--
OP Code
--
-
10
00
01
00
00
11
00
Bit 4
Bit 4
--
--
-
Bit 3
Bit 3
--
P. 20
--
-
address
--
Address
Epdiv1
11xxxx
01xxxx
00xxxx
10xxxx
A5-A0
A5-A0
A5-A0
Bit 2
Bit 2
--
-
B2: R/W
Epdiv1
-
Epdiv0
Bit1
Bit1
Publication Date: JAN. 2006
B1: R/W
Epdiv0
-
T81L0006A/B
Input Data
Bit 0
Bit 0
Epst
LSB
LSB
D15-D0
D15-D0
B0: R/W
Epst
W
Revsion : C

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