IXXBB1 Fujitsu Microelectronics, Inc., IXXBB1 Datasheet - Page 126

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IXXBB1

Manufacturer Part Number
IXXBB1
Description
32-bit Proprietary Microcontroller Cmos Fr60 Mb91301 Series
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
126
MB91301 Series
(Continued)
P : General-purpose port selected, F : Specified function selected
Notes : • The bus width is determined after a mode vector fetch.
132 to 139 P00 to P07
142 to 144 P10 to P12
Pin no.
100
103
104
105
106
107
108
109
110
122
123
124
125
126
127
128
129
81
82
83
84
85
86
87
88
90
91
92
93
94
95
96
97
98
99
• The bus width at initialization time is 8 bits.
name
Port
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PH0
PH1
PH2
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
DACK1/TRG1
DEOP1/PPG1
Specified
INT6/SOT2
INT7/SCK2
TIN1/PPG3
TIN2/TRG3
D00 to D07
D08 to D10
INT4/ATG/
CS4/TRG2
CS5/PPG2
INT0/ICU0
INT1/ICU1
INT2/ICU2
INT3/ICU3
INT5/SIN2
function
DREQ0
DACK0
DEOP0
DREQ1
name
FRCK
SOT0
SCK0
SOT1
SCK1
PPG0
TRG0
IOWR
IORD
SIN0
SIN1
TIN0
CS0
CS1
CS2
CS3
CS6
CS7
Bus width
Function
P00 to P07
P10 to P12
name
16 bit
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PH0
PH1
PH2
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
Bus width
P00 to P07
P10 to P12
At initialization (INIT)
Function
name
8 bit
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PH0
PH1
PH2
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
Output Hi-Z
Input ready
Output Hi-Z
Input ready
Output Hi-Z
Input ready
Output Hi-Z
Input ready
Output Hi-Z
Input ready
H output
Output Hi-Z
Input ready
Initial
value
P : Previous
F : Normal
P : Previous
F : Normal
P : Previous
F : Normal
P : Previous
F : Normal
P : Previous
F : Normal
H output
P : Previous
F : Output
Sleep
mode
state held
operation
state held
operation
state held
operation
state held
operation
state held
operation
state held
held or
Hi-Z
P : Previous
F : Input
P : Previous
F : Input
Previous
state held
Previous
state held
Previous
state held
H output
P : Previous
F : Output
HIZ = 0
state held
held or
Hi-Z
state held
ready
state held
ready
Stop mode
P : Output
F : Input
P : Output
F : Input
Output
Hi-Z/input 0
fixed
Output
Hi-Z/input 0
fixed
Output
Hi-Z/input 0
fixed
Output Hi-Z
Output
Hi-Z/input 0
fixed
HIZ = 1
Hi-Z
ready
Hi-Z
ready
Normal
operation
Normal
operation
Normal
operation
Normal
operation
Normal
operation
F : SREN =
Output Hi-Z Output Hi-Z
shared
0 : H
output,
SREN =
1 : Out-
put Hi-Z
CS
Bus released
(BGRNT)
Normal
operation
Normal
operation
Normal
operation
Normal
operation
Normal
operation
F : SREN =
CS not
shared
0 : H
output,
SREN =
1 : Out-
put Hi-Z

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