ADN2865 Analog Devices, Inc., ADN2865 Datasheet - Page 26

• Manufacturer Part Number: ADN2865
• Description: Continuous Rate 12.3mb/s To 2.7gb/s Clock And Data Recovery Ic W/loop Timed Serdes
• Manufacturer: Analog Devices, Inc.

ADN2865
APPLICATIONS INFORMATION
PCB DESIGN GUIDELINES
Proper RF PCB design techniques must be used for optimal
performance.
Power Supply Connections and Ground Planes
Use of one low impedance ground plane is recommended. The
VEE pins should be soldered directly to the ground plane to
reduce series inductance. If the ground plane is an internal
plane and connections to the ground plane are made through
vias, multiple vias can be used in parallel to reduce the series
inductance. The exposed pad should be connected to the GND
plane using plugged vias so that solder does not leak through
the vias during reflow.
Use of a 10 μF electrolytic capacitor between VCC and VEE is
recommended at the location where the 3.3 V supply enters the
PCB. When using 0.1 μF and 1 nF ceramic chip capacitors, they
should be placed between the IC power supply VCC and VEE,
as close as possible to the ADN2865 VCC pins.
Figure 27. Typical ADN2865 Applications Circuit
Rev. PrA | Page 26 of 33
If connections to the supply and ground are made through vias,
the use of multiple vias in parallel helps to reduce series
inductance, especially on Pins 7,45 & 50, which supplies power
to the high speed LVDS & CML output buffers. Refer to the
schematic in Figure for recommended connections.
By using adjacent power supply and GND planes, excellent high
frequency decoupling can be realized by using close spacing
between the planes. This capacitance is given by
where:
ε
A is the area of the overlap of power and GND planes (cm
d is the separation between planes (mm).
For FR-4, ε
r
is the dielectric constant of the PCB material.
C
plane
=
r
= 4.4 mm and 0.25 mm spacing, C ~15 pF/
. 0
88
ε
r
A/d
Preliminary Technical Data
( )
pF
2
).