TDC-GP2 acam messelectronic gmbh, TDC-GP2 Datasheet - Page 18

• Manufacturer Part Number: TDC-GP2
• Description: Precision Time Interval Measurement
• Manufacturer: acam messelectronic gmbh

Start
Stop
3 Measurement Range 1
3.1 General Description
Digital TDCs use internal propagation delays of signals
through gates to measure time intervals with very high
precision. Figure 5 clarifies the principal structure of
such an absolute-time TDC. Intelligent circuit struc-
tures, redundant circuitry and special methods of lay-
out on the chip make it possible to reconstruct the
exact number of gates passed by the signal. The maxi-
mum possible resolution strongly depends on the
maximum possible gate propagation delay on the chip.
The measuring unit is actuated by a START signal and
stopped by a STOP signal. Based on the position of the
ring oscillator and the coarse counter the time interval
between START and STOP is calculated with a 20 Bit
measurement range.
The BIN size (LSB) is typically 65 ps at 3.3 V and 25 °C
ambient temperature. The RMS noise is about 50 ps
(0.7 LSB). The gate propagation delay times strongly
depend on temperature and voltage. Usually this is
solved doing a calibration. During such a calibration the
TDC measures 1 and 2 periods of the reference clock.
The measurement range is limited by size of the
counter:
High-speed unit
2 stop channels referring to one start channel
Each of typ. 50 ps RMS resolution
LSB width typ. 65 ps
15 ns pulse pair resolution
4-fold multihit capability for each stop channel
Measurement range 3.5 to 1.8 µs (0 to 1.8µs
between stop channels)
Selectable rising/falling edge sensitivity for each
channel
Enable pins for powerful windowing functionality
The possibility to arbitrarily measure all events
against each other
acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de
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= BIN x 26224
dynamic value memory
Figure 5
data post processing
1.8 µs
counter
coarse
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Input circuitry
Each input separately can be set to be sensitive to
rising or falling edge or both edges. This is done in
register 0, Bits 0 to 2. (NEG_START, NEG_STOP1,
NEG_STOP2) and register 2, Bit 19&20, RFEDGEx.
Furthermore all Start/Stop-inputs support a high active
enable pin.
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Stop 2
Stop 1
INTN
Start
Time (Condition)
2,5 ns (min.)
2,5 ns (min.)
3.5 ns ns (min)
1,8 µs (max.)
15 ns (typ.)
15 ns (typ.)
560 ns uncalibrated
4.6 µs calibrated
No timing limits
1,8 µs (max)
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Figure 6
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3.1 General Descri pti on
Description
Minimum pulse width
Minimum pulse width
Start to Stop
Rising edge to rising edge
Falling edge to falling edge
Last hit to data valid
Max. measuring range
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TDC-GP2
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