TDC-GPX acam messelectronic gmbh, TDC-GPX Datasheet
TDC-GPX
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TDC-GPX Summary of contents
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... 2007 TDC-GPX ...
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... Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 2 TDC-GPX ...
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... IO voltage 3.0 V – 3 µs Core voltage 2.3 V – 3.6 V regulated by resolution adjust unit Data bus: 28 Bit Bit asynchronous with Chipselect, Readstrobe, Writestrobe 40 MHz continuous rate per chip Address range: 4 Bit 3 TDC-GPX LVTTL inputs TStop2 TStop3 TStop4 TStop5 TStop6 TStop7 TStop8 Input Logic ...
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... G-Mode Basics.......................................................................................................................................32 3.4 Data structure and readout ....................................................................................................................33 3.5 Reset ...................................................................................................................................................34 3.6 MTimer .................................................................................................................................................34 3.7 Interrupt Flag .......................................................................................................................................34 3.8 Error Flag..............................................................................................................................................34 3.9 Testinputs.............................................................................................................................................34 3.10 RaSpeed & Delx....................................................................................................................................34 3.11 G-Mode Timing & Resolution ..................................................................................................................35 3.12 Measurement Flow ...............................................................................................................................36 4 R-Mode 4.1 Block diagram R-Mode ............................................................................................................................37 4.2 Input Circuitry R-Mode............................................................................................................................38 4.3 R-Mode Basics.......................................................................................................................................39 acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 4 TDC-GPX ...
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... Block diagram M-Mode............................................................................................................................45 5.2 Input Circuitry M-Mode ...........................................................................................................................46 5.3 M-Mode Basics ......................................................................................................................................47 5.4 Data structure and readout ....................................................................................................................48 5.5 Reset ...................................................................................................................................................48 5.6 MTimer .................................................................................................................................................49 5.7 Interrupt Flag .......................................................................................................................................49 5.8 Error Flag..............................................................................................................................................49 5.9 Testinputs.............................................................................................................................................49 5.10 M-Mode Timing & Resolution..................................................................................................................49 5.11 Measurement Flow ...............................................................................................................................50 6 Bug Report 6.1 Data Bus: 16 Bit Mode ...........................................................................................................................51 Contact acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 5 TDC-GPX ...
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... MHz 25°C 0.3 V, Vss = -40 to +85°C) Condition TTL 5V tolerant input TTL 5V tolerant input I/O Core Hardmacro Oscillator Diff. inputs Val Vdde-1.53V < VinOS < Vdde-0.89V 0.2V < VinDF < 2.1V 6 TDC-GPX Rated Value Unit -0.3 to +3.6 V -0.3 to +3.6 -0.3 to +3.6 -0.3 to +3.6 -0.3 to +3.6 -0 -65 to 150 ° ...
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... Write HIGH Time Write Data Setup Time Write Data Hold Time Chip Select Setup Time Chip Select Hold Time valid t H-AD t PW-RH t H-CSN t H-DR valid High-Z Min (ns) Max (ns TDC-GPX valid t PW-WL valid Figure 1 Min (ns) Max (ns valid t PW-RL t ...
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... RD* 1.3.2 16 Bit Mode The TDC-GPX data bus can be switched from 28 Bit to 16 Bit. This is done writing a 0x0000010 to address 14. After that all read / write commands have to be done in pairs. When reading the last data from an interface FIFO the empty flag disappears already with the first read command. Nonetheless it is mandatory to read a second time ...
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... StopDis - Figure Min (ns Description Reset pulse width Min (ns Master Reset (at pin) 13 Start/Stop Min (ns Partial Reset (at pin Start/Stop 9 TDC-GPX t t S2-DH S1-DL t S1-DH pass not allowed no pass no pass Max (ns) 6.3 6.1 5.2 7.4 Min (ns) Max (ns) 200 - rfs t rrs accept not acc. accept Figure ...
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... General Timings & Resolution The TDC-GPX time measurement is based on internal propagation delays. Those delays depend on tempera- ture and voltage. They also vary over the production lots. The resolution adjust mode (see) uses the voltage dependency to compensate for temperature and pro- duction variations and sets the circuits to a fixed and programmable resolution ...
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... Vsso 64 Test 63 OEN 62 Vssc 61 TStop8 60 ErrFlag 59 IrFlag 58 LF2 57 LF1 56 RefClk 55 Vsso 54 Vddo 53 EF2 52 EF1 51 D27 Figure 13 Description 11 TDC-GPX Type Terminal () = if not used Vddc Vddo TTL input (10k to GND) TTL input (GND) TTL input (GND) TTL input (GND) (10k to GND) TTL input ...
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... Bidirectional 4mA Bidirectional 4mA Bidirectional 4mA Bidirectional 4mA Output 4mA Output 4mA TTL input Output 1mA Output 1mA Output 1mA Output 1mA TTL input TTL input 12 TDC-GPX Vddo GND 10k to GND 10k to GND 10k to GND 10k to GND 10k to GND 10k to GND ...
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... TTL input TTL input TTL input TTL input TTL input TTL input Differential input Differential input Differential input Differential input Differential input Differential input TTL input 13 TDC-GPX GND GND (10k to GND) GND Vddc (10k to GND) (10k to GND) (10k to GND) Vddo GND ...
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... Package Drawings TQFP100: Sockets: E.g. Yamaichi IC149-100-025 TFBGA: acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de Figure 14 14 TDC-GPX ...
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... TDC-GPX is adjusted quartz- accurately and absolutely temperature stable via Phase Locked Loop The phase locked loop (PLL) regu- lates the core voltage of the TDC-GPX so that the reso- lution is set exactly to the programmed value. The BIN size is calculated as follows: ...
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... Supply voltages Although the TDC-GPX is a fully digital circuit, some analog measures affect the circuit. The reason is that the TDC is based on the internal analog measure 'propagation delay time' which is influenced by tem- perature and supply voltage. A good layout of the sup- ply voltage is essential for good measurement results. ...
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... DelRise1 Service bits, set ‘0’ 22 – 23 DelFall1 Service bits, set ‘0’ 24 – 25 DelRise2 Service bits, set ‘0’ 26 – 27 DelFall2 Service bits, set ‘0’ acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 17 TDC-GPX ...
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... Partial reset by Alutrigger pin HIGH (only with no Quiet Mode) 25 MasterOenTrig Master reset by OEN pin LOW (only with OEN not used) 26 PartialOenTrig Partial reset by OEN pin LOW (only with OEN not used) 27 StartRetrig Start retrigger acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 18 TDC-GPX ...
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... Start number of this hit 26 – 27 ChaCode2 Channel code of this hit Register 10: Adr = 10 0 – 16 Start01 Time interval between external start and first internal start 17 – not used acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 19 TDC-GPX ...
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... G-Mode: counting falling edge R-Mode: counting rising edge ‘1’ unmasks full flags of Hit FIFOs to ErrFlag pin ‘1’ unmasks full flags of Interface FIFOs to ErrFlag pin ‘1’ unmasks ‘PLL not locked’ to ErrFlag pin 20 TDC-GPX read only read only read/write read/write read/write ...
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... IntFlag pin ‘1’ unmasks ‘All Hit FIFOs empty’ to IntFlag pin ‘1’ unmasks end of MTimer to IntFlag pin ‘1’ unmasks highest bit of Start# (I-Mode) to IntFlag pin Set to “0” 21 TDC-GPX read only read only read only read only read only ...
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... Collecting logic unit with automatic bandwith distribution 28 Interface FIFO 28 x 256 40 MHz 28 max. Data multiplexer 40 MHz 28 or 2x16 max. EF1 LF1 Databus Figure 16: Block diagram 22 TDC-GPX TStop TStop TStop Input Input Input Logic Logic Logic Hit Hit Hit 32 cells ...
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... Res TRiseEn[7] 0 StopDis4 1 S Fall Res TFallEn[7] StopDis4 Rise Res TRiseEn[8] 0 StopDis4 1 S Fall Res TFallEn[8] StopDis4 23 TDC-GPX Chan0 (pin) Disable[0] (pin) Chan1 (pin) Disable[1] (pin) Chan2 (pin) Disable[2] (pin) Chan7 (pin) Disable[7] (pin) Chan8 (pin) Disable[8] (pin) Figure 17: Input circuitry ...
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... All inputs can be disabled by hardware, the stop inputs in pairs (pin ‘StopDis1’ disables inputs TStop1 and TStop2, etc.). They also can be disabled by Software setting the ‘Disable’ bits in register 2. The TDC-GPX offers the possibility to disable the Stop inputs auto- matically until a Start is coming in. This is set by Stop- DisStart = ‘ ...
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... StartOff1 start period and reducing the start number by 1. StopDisStart & StartDisStop By default the Start and Stop inputs of the TDC-GPX are open immediately after a reset. The consequence for the Stop channels is that even hits coming before a Start pulse will be measured. The bit StopDisStart in register 5 disables the Stop chan- nels until there is a Start pulse ...
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... The selection is done in register 11, Bits 16 to 26, by unmasking the dedicated bits. They are combined by an Or-Gate to the error flag. Selectable events are 26 TDC-GPX Hit FIFOs 1, 2 …or/and 8 are full Interface FIFOs 1 or/and 2 are full PLL not locked All Hit FIFOs empty ...
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... Figure 22: DNL INL The integral non-linearity describes the deviation over the full measuring range. The INL of the TDC-GPX for a single Start-Stop measurement with a delay > below our measurement capability and can be ne- glected. In the close-up region below 6 ns the deviation is about 100 ps ...
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... Mtimes trig. by Start, EFlagHiZN // Res = 82.3045ps // Any error -> ErrFlag // Mtimer -> IrFlag // Master reset // Enable inputs // Check interrupt flag // Check empty flag // Data on IFIFO1? // Read IFIFO1 // Get channel# // Get time Stop-Start // Data on IFIFO2? // Read IFIFO2 // Get channel# // Get time Stop-Start // Master reset 28 TDC-GPX ...
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... Get Start# // Get time Stop-Start // Negative time refers to next start // Remap time to old start // Correct start number // Data on IFIFO2? // Read IFIFO2 // Get channel# // Get Start# // Get time Stop-Start // Negative time refers to next start // Remap time to old start // Correct start number 29 TDC-GPX ...
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... CLU1 Interface Fifo1 28 x 256 28 40 MHz max. Data multiplexer 40 MHz 28 or 2*16 max. LF1 EF1 Data bus 30 TDC-GPX DStop2 (LVPECL) 20 MHz cont. max 200 MHz peak max Input Logic high res Hit Hit Hit 32 cells FIFO6 FIFO7 FIFO8 Stop6 ...
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... RiseEn1 StopDis1 (pin) S Fall Res FallEn1 StopDis2 (pin) Rise Res RiseEn2 StopDis3 (pin) S Fall Res FallEn2 StopDis4 (pin) GTest Figure 24 31 TDC-GPX RiseEn0! Chan0 Disable[0] Chan1 Disable[1] Chan2 Chan3 Disable[2] Disable[3] Chan4 Chan5 Disable[4] Disable[5] Chan6 Chan7 Disable[6] Disable[7] Chan8 Disable[8] ...
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... The ‘Disable’ bits have to be set in pairs, e.g Disable3 and Disable4 to disable Dstop, falling edge. StopDisStart & StartDisStop By default the Start and Stop inputs of the TDC-GPX are open immediately after a reset. The consequence for the Stop channels is that even hits coming before a Start pulse will be measured. The bit StopDisStart in register 5 disables the Stop chan- nels until there is a Start pulse ...
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... ALU to look "into the past" without handling negative values (which the ALU could not do). It allows handling Start-Stop intervals down to 0 and even less. In G-Mode the TDC-GPX creates a second pulse on the Start channel by its own. Therefore two offset values have to be set. ‘StartOff1’ in register 5 and StartOff2 in register 6, both in multiples of BIN and 18 bits wide ...
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... For some chips it might be necessary to add an internal, additional delay to guarantee correct data processing. These delays are set by the RaSpeed bits and the Del- Risex/DelFallx/DelTx in registers 2, 3 and 4. Increas- ing those will reduce the pulse-pair resolution of the TDC-GPX . RaSpeed & Delx 34 TDC-GPX Pulse-pair resolution 0 5 ...
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... DNL the TDC-GPX shows a moderate differential non- linearity (DNL) because internal propagation delays were used for the time measurement and because those delays are different for rising and falling edges, but the variation from channel to channel is system- atic. The following diagram shows the DNL data at a ...
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... Res = 41.1523ps, Mtimer = 1µs // Any error -> ErrFlag // Mtimer -> IrFlag // Master reset // Enable inputs // Check interrupt flag // Check empty flag // Data on IFIFO1? // Read IFIFO1 // Channel# // Get edge // Get time Stop-Start // Data on IFIFO2? // Read IFIFO2 // Channel# // Get edge // Get time Stop-Start // Master reset 36 TDC-GPX ...
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... Interface Fifo1 Interface Fifo2 28 x 256 40 MHz 40 MHz 28 max. max. Data multiplexer 40 MHz 28 or 2x16 max. LF1 EF1 Data bus Figure 28 37 TDC-GPX DStop2 (LVPECL) 20 MHz max. 200 MHz peak high res Hit Hit 32 cells FIFO7 FIFO8 Stop2b Stop2c value value ...
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... Res RiseEn1 StopDis1 (pin) S Fall Res FallEn1 StopDis2 (pin) Rise Res RiseEn2 StopDis3 (pin) S Fall Res FallEn2 StopDis4 (pin) GTest Figure 29 38 TDC-GPX Chan0 Disable[0] Chan1 Disable[1] Chan2 Disable[2] Chan3 Disable[3] Chan4 Disable[4] Chan5 Disable[5] Chan6 Disable[6] Chan7 Disable[7] Chan8 Disable[8] ...
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... Disable3, Disable4 and Disable5 to disable DStop1. Description StopDisStart & StartDisStop By default the Start and Stop inputs of the TDC-GPX are open immediately after a reset. The consequence for the Stop channels is that even hits coming before a Start pulse will be measured. The @ 87 ps resolution bit StopDisStart in register 5 disables the Stop chan- nels until there is a Start pulse ...
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... TDC. Adjusting the Start-Offset The Start-Offset register of the TDC-GPX allows the compensation for the offset due to the different inter- nal delays. It allows to do measurements down time intervals between Start and Stop. The correct setting should be done by experiment ...
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... For some chips it might be necessary to add an internal, additional delay to guarantee correct data processing. These delays are set by the RaSpeed bits and the Del- Risex/DelFallx/DelTx in registers 2, 3 and 4. Increas- ing those will reduce the pulse-pair resolution of the TDC-GPX . RaSpeed & Delx 41 TDC-GPX Pulse-pair resolution 1 5 ...
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... R-Mode Timing & Resolution TDC-GPX is working in resolution adjust mode. The resolution adjust unit is identical with TDC-F1’s unit. The delay parameters vary with voltage, temperature and process tolerance. The following table lists the derating factors. Derating by Minimal Voltage ...
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... Rising and falling edges, Start ringoscil. // Channel adjust = 6 & R-Mode, channel adjust = 6 & Use LVTTL inpus // EFlagHiZN // StartOff1 = 100ns, StartRetrigger // Fill = 200 // Res = 27.4348ps // Any error -> ErrFlag // No IrFlag // Master reset // Enable inputs // Fill level=200 IFIFO1 reached? // Read 200 times // Read IFIFO1 // Get time Stop-Start 43 TDC-GPX ...
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... EFlagHiZN, Quiet mode, Mtimer on Start // StartOff1 = 100ns // Power-on ECL // Res = 27.4348ps, Mtimer = 1 µs // Any error -> ErrFlag // Mtimer -> Interrupt flag // Master reset // Enable inputs // Check interrupt flag // Trigger Alu // Time to calculate first hit // Check empty flag // Read IFIFO1 // Get time Stop-Start // Master reset 44 TDC-GPX ...
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... Interface Fifo1 Interface Fifo2 28 x 256 40 MHz 40 MHz 28 max. max. Data multiplexer 40 MHz 28 or 2x16 max. LF1 EF1 Data bus Figure 33 45 TDC-GPX DStop2 (LVPECL) 500 kHz max. high res Hit Hit 32 cells FIFO7 FIFO8 Stop2b Stop2c value value 40 MHz 28 x 256 ...
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... Res RiseEn1 StopDis1 (pin) S Fall Res FallEn1 StopDis2 (pin) Rise Res RiseEn2 StopDis3 (pin) S Fall Res FallEn2 StopDis4 (pin) GTest Figure 34 46 TDC-GPX Chan0 Disable[0] Chan1 Disable[1] Chan2 Disable[2] Chan3 Disable[3] Chan4 Disable[4] Chan5 Disable[5] Chan6 Disable[6] Chan7 Disable[7] Chan8 Disable[8] ...
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... R-Mode. The block diagram and the input circuitry are the same as in R-Mode. Also the furhter settings are the same as in R-Mode. In this mode the TDC-GPX accepts only one Stop per channel necessary to select M-Mode in combina- tion with quiet mode. ...
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... LOW at the OEN input pin (only with OEN off). After a Power-on reset or a Master reset it takes 40 ns before the Start and Stop inputs accept data. After a Partial reset it takes 75 ns before the Start and Stop inputs accept data. 48 TDC-GPX MSet 1 Bit 22...0 ...
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... M-Mode Timing & Resolution TDC-GPX is working in resolution adjust mode. The intrinsic delay parameters vary with voltage, tem- perature and process tolerance. The resolution adjust unit uses the voltage depency to compensate for tem- perature and process variations ...
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... EFlagHiZN, Quiet Mode, M-Mode // - // Switch on ECL power // Bin = 0.8850ps (resolution ~ 10ps rms) // Any error -> ErrFlag // MTimer to IrFlag // Master reset // Enable inputs // send trigger to the laser // Check Interrupt flag // Reg4, ALU trigger // Check Empty flag // Read FIFO0 // Display time Master reset 50 TDC-GPX ...
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... Strobes on RDN or WRN toggle between the two latches. This should be deactived when CSN is high but it is not. As long as CSN is high no data are written in the TDC-GPX but the latches are toggled. If CSN goes low and the pointer is already on the high-word latch then the data with the next RDN/WRN strobe will be wrong. ...
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... Lamfe Amerikaweg 67 NL 7332 BP Apeldoorn Neunbrunnenstr. 55 8050 Zürich 100, Prospekt Mira, Moscow, 129626, Russia 264 Center Street Miamiville, Ohio 45147 52 TDC-GPX Tel: +49 (0) 7244 7419-0 Fax: +49 (0) 7244 7419-29 support@acam.de www.acam.de Tel: +31 (0) 55 3558611 Fax: +31 (0) 55 3560211 info@censelect.nl www.censelect.nl Tel Fax : + commercial@microel ...
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... Tokyo 101-0021 Shanghai Office: 3C JinHuan Building, 489 Xiang Yang Road South Shanghai, 200031 #4 4F Kyungwon building, 416-6 Jakjeon-dong GYEYANG-GU, INCHEON 407-060 53 TDC-GPX Tel: +91 22 2387 5565 Fax: +91 22 2388 7063 www.brilliantelectronics.com besimpex@vsnl.net Tel: 972-8-9230555 Fax: 972-8-9230044 email: info@arazim.com www.arazim.co.il ...