TDC-GPX acam messelectronic gmbh, TDC-GPX Datasheet - Page 10

• Manufacturer Part Number: TDC-GPX
• Description: Precision Time Interval Measurement
• Manufacturer: acam messelectronic gmbh

1.3.5 General Timings & Resolution
The TDC-GPX time measurement is based on internal
propagation delays. Those delays depend on tempera-
ture and voltage. They also vary over the production
lots. The resolution adjust mode (see) uses the voltage
dependency to compensate for temperature and pro-
duction variations and sets the circuits to a fixed and
programmable resolution.
Figure 9 shows the dependency of all timings from the
core voltage, referred to the 3.3V timings. The resolu-
tion at 3.3V can be varied by factors 0.93 at 3.6V to
1.4 at 2.3V.
Figure 10 shows the dependency of all timings on the
temperature, referred to 25°C junction temperature. If
the temperature increases from 25°C to 70°C, the
intrinsic resolution goes down by a factor 1.077. In
resolution adjust mode this is compensated by increas-
ing the core voltage from 3.3V to 3.6V.
-40 -30 -20 -10
1,50
1,40
1,30
1,20
1,10
1,00
0,90
0,80
0,889
1,40
2,3
Delay Variation Dependency on Power Supply Voltage
1,33
0,923
1,200
1,100
1,000
0,900
0,800
acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de
Delay Variation Dependency on Temperature
1,27
2,5
0
0,957
10
1,22
20
1,17
2,7
1,000
30
Figure 10
Figure 9
1,13
40
Tj(°C)
50
1,10
2,9
1,043
Vddc
60
1,07
70
1,077
1,05
80
3,1
1,102
90 100 110 120 130 140
1,02
1,128
1,00
3,3
0,98
1,170
0,95
3,5
0,93
10
Without resolution adjust, the intrinsic resolution var-
ies slightly from chip to chip. The distribution over the
production lots is of gaussian type.
Within a single production lot the distribution is nar-
rower. Figure 12 shows a typical distribution of the
intrinsic resolution at 3.3 V core voltage and 25°C
ambient temperature within a single production lot.
Example:
Taking the distribution from Figure 12 and assuming
an operating temperature range of 0°C to 40°C as
well as 1 Mhz data rate. The junction temperature will
be about 57°C max. The slowest chips will have 92ps
* 1.043 = 97ps resolution at 3.3V Vddc. Increasing
the core voltage to 3.6V will speed them up to 90.2ps.
Setting the resolution adjust mode to a resolution of
95ps will guarantee that the PLLs of all chips will lock
at one and the same resolution over the whole operat-
ing temperature range.
(0.74)
60ps
-3
Best
(@V
-2
70ps
(@V
ddc
ddc
-1
= 3.3V, T
= 3.3V, T
Figure 11
Figure 12
Typical
81ps
(1.0)
81ps
0
amb
amb
= 25°C)
1
TDC-GPX
= 25°C)
92ps
2
104ps
(1.31)
Worst
3