MTV038 ETC-unknow, MTV038 Datasheet - Page 14

• Manufacturer Part Number: MTV038
• Description: On-screen Display Controller For Crt/lcd Monitor
• Manufacturer: ETC-unknow

DWE - Enable double width. When the bit is set to 1, the display of OSD menu can change to half resolution
HSP -
VSP -
VCO1, VCO0 - Select the appropriate curve partitions of VCO frequency to voltage based on HFLB input and
Revision 1.1
Notes :
Column 19
Fonts designed to be 12x18 display
1. That is, if HORR is specified and RP resister = 3.3K ohm, then (VCO1, VCO0)
2. It is necessary to wait for the PLL to become stable while (i) the HORR register is being changed; (ii) the (VCO1,
3. When PLL is unstable, don't write data in any address except Column 15,17,18 of Row 15. If data is written in any
VCO0) bits is changed; (iii) the horizontal signal (HFLB) is changed.
other address, a malfunction may occur.
for double character width, and then the number of pixels of each line should be even. The initial value
is 0 after power up.
= 1 -> Accept positive polarity Hsync input.
= 0 -> Accept negative polarity Hsync input.
= 1 -> Accept positive polarity Vsync input.
= 0 -> Accept negative polarity Vsync input.
horizontal resolution register (HORR). And there are different curve partitions based on differ-
ent application resister value on pin 3 (pin RP) as below:
(i)R
= (0, 0)
= (0, 1)
= (1, 0)
= (1, 1)
(ii)2.2K ohm < R
= (0, 0)
= (0, 1)
= (1, 0)
= (1, 1)
Where Pixel rate = VCLK Freq = HFLB Freq * HORR * 12
The initial value is (0, 0) after power up.
MYSON
TECHNOLOGY
B7
-
RP
= 5.6K ohm:
->
->
->
->
->
->
->
->
b6
-
112MHz < Pixel rate < 150MHz
24MHz < Pixel rate < 48MHz
48MHz < Pixel rate < 96MHz
96MHz < Pixel rate < 128MHz
28MHz < Pixel rate < 56MHz
56MHz < Pixel rate < 112MHz
6MHz < Pixel rate < 24MHz
RP
6MHz < Pixel rate < 28MHz
< 3.3K ohm:
FIGURE 8. 12x18 and 12x16 Fonts
b5
-
= (0, 0) if
= (0, 1) if
= (1, 0) if
= (1, 1) if 112000/(HORR * 12) < HFLB Freq (KHZ) < 150000/(HORR * 12)
b4
-
28000/(HORR * 12) < HFLB Freq (KHZ) < 56000/(HORR * 12)
56000/(HORR * 12) < HFLB Freq (KHZ) < 112000/(HORR * 12)
6000/(HORR * 12) < HFLB Freq (KHz) <
-14-
Output display if FSS=0; first and last lines omitted
b3
-
CSR
b2
CSG
b1
(Revision 1.1)
CSB
b0
28000/(HORR * 12)
MTV038
2001/8/21