PM25LV010 Programmable Microelectronics, PM25LV010 Datasheet

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PM25LV010

Manufacturer Part Number
PM25LV010
Description
(PM25LV010 / PM25LV512) Serial Flash Memory
Manufacturer
Programmable Microelectronics
Datasheet
FEATURES
- Low voltage range: 2.7 V - 3.6 V
• Memory Organization
- Pm25LV512: 64K x 8 (512 Kbit)
- Pm25LV010: 128K x 8 (1 Mbit)
- Uniform 4 Kbyte sectors
- Uniform 32 Kbyte blocks (8 sectors per block)
- Two blocks with 32 Kbytes each (512 Kbit)
- 128 pages per block
- Supports SPI Modes 0 (0,0) and 3 (1,1)
- 25 MHz clock rate (maximum)
- 256 bytes per page
GENERAL DESCRIPTION
The Pm25LV512/010 are 512 Kbit/1 Mbits 3.0 Volt-only serial Flash memories. These devices are designed to use
a single low voltage, range from 2.7 Volt to 3.6 Volt, power supply to perform read, erase and program operations.
The devices can be programmed in standard EPROM programmers as well.
essential. The Pm25LV512/010 is enabled through the Chip Enable pin (CE#) and accessed via a 3-wire interface
consisting of Serial Data Input (Sl), Serial Data Output (SO), and Serial Clock (SCK). All write cycles are com-
pletely self-timed.
Block Write protection for top 1/4, top 1/2 or the entire memory array (1M) or entire memory array (512K) is enabled
by programming the status register. Separate write enable and write disable instructions are provided for additional
data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts
to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial
sequence.
The Pm25LV512/010 are manufactured on PMC’s advanced nonvolatile CMOS technology, P-FLASH™. The de-
vices are offered in 8-pin JEDEC SOIC and 8-contact WSON packages with operation frequency up to 25 MHz.
The device is optimized for use in many commercial applications where low-power and low-voltage operation are
Cost Effective Sector/Block Architecture
Single Power Supply Operation
Four blocks with 32 Kbytes each (1 Mbit)
Serial Peripheral Interface (SPI) Compatible
High Performance Read
Page Mode for Program Operations
512 Kbit / 1 Mbit 3.0 Volt-only, Serial Flash Memory
1
- The Block Protect (BP1, BP0) bits allow part or entire
- Write Protect (WP#) pin will inhibit write operations
• Page Program (up to 256 Bytes)
- Typical 2 ms per page program time
• Sector, Block and Chip Erase
- Typical 40 ms sector/block/chip erase time
- Build-in erase before programming
- Guarantee 100,000 program/erase cycles per single
- Minimum 20 years data retention
- 8-pin JEDEC SOIC
- 8-contact WSON
- Optional lead-free (Pb-free) packages
of the memory to be configured as read-only.
to the status register
Block Write Protection
Single Cycle Reprogramming for Status Register
High Product Endurance
Industrial Standard Pin-out and Package
Hardware Data Protection
sector (preliminary)
Pm25LV512 / Pm25LV010
With 25 MHz SPI Bus Interface

Related parts for PM25LV010

PM25LV010 Summary of contents

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... FEATURES Single Power Supply Operation - Low voltage range: 2 3.6 V • Memory Organization - Pm25LV512: 64K x 8 (512 Kbit) - Pm25LV010: 128K Mbit) Cost Effective Sector/Block Architecture - Uniform 4 Kbyte sectors - Uniform 32 Kbyte blocks (8 sectors per block) - Two blocks with 32 Kbytes each (512 Kbit) ...

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CONNECTION DIAGRAMS Vcc 8-Pin SOIC PIN DESCRIPTIONS ...

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... C E Environmental Attribute E = Lead-free (Pb-free) Package Blank = Standard Package Temperature Range C = Commercial (0°C to +85°C) Package Type S = 8-pin SOIC (8S 8-contact WSON (8Q) Operating Speed 25 MHz PMC Device Number Pm25LV512 (512 Kbit) Pm25LV010 (1 Mbit) Package Temperature Range Commercial ...

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BLOCK DIAGRAM Control Logic Address Latch & Counter SPI Chip Block Diagram High Voltage Generator Instruction Decoder Serial /Parallel convert Logic 2KBit Page Buffer Memory Array Status Register ...

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SERIAL INTERFACE DESCRIPTION Pm25LV512/010 can be driven by a microcontroller on the SPI bus as shown in Figure 1. The serial communication term definitions are in the following section. MASTER: The device that generates the serial clock. SLAVE: Because the ...

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SERIAL INTERFACE DESCRIPTION (CONTINUED) SPI MODES These devices can be driven by microcontroller with its SPI peripheral running in either of the two following modes: Mode 0 = (0, 0) Mode 3 = (1, 1) For these two modes, input ...

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... Serial Clock (SCK). Then the first manufacturer ID (9Dh) is shifted out on Serial Data Output (SO), followed by the device ID (7Bh = Pm25LV512; 7Ch = Pm25LV010) and the second manufacturer ID (7Fh), each bit been shifted out during the falling edge of Serial Clock (SCK). ...

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... WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protec- tion for the Pm25LV010. The Pm25LV010 is divided into four blocks where the top quarter (1/4), top half (1/2), or all of the memory blocks can be protected (locked out) from write. The Pm25LV512 is divided into 2 blocks where all of the memory blocks can be protected (locked out) from write ...

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Table 5. Block Write Protect Bits ...

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READ: Reading the Pm25LV512/010 via the SO (Serial Output) pin requires the following sequence. After the CE# line is pulled low to select a device, the READ instruction is transmitted via the Sl line followed by the byte address to ...

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SECTOR_ERASE, BLOCK_ERASE: Before a byte can be reprogrammed, the sector/block which contains the byte must be erased. In order to erase the Pm25LV512/010, two separate instructions must be executed. First, the device must be write enabled via the WREN instruction. ...

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ABSOLUTE MAXIMUM RATINGS ...

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DC CHARACTERISTICS Applicable over recommended operating range from 0°C to +85° +2 +3.6 V (unless otherwise noted Symbol Parameter I Vcc Active Read Current CC1 I Vcc Program/Erase Current CC2 I Vcc ...

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AC CHARACTERISTICS Applicable over recommended operating range from 1TTL Gate and 30 pF (unless otherwise noted ...

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AC CHARACTERISTICS (CONTINUED) AC WAVEFORMS ( VALID HI ...

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AC CHARACTERISTICS (CONTINUED) HOLD Timing PIN CAPACITANCE ( MHz 25° ...

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TIMING DIAGRAMS RDID Timing Dummy Bytes SI 1010 1011b ...

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RDSR Timing INSTRUCTION = 0000 0101b WRSR Timing ...

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FAST READ Timing INSTRUCTION = 0000 1011b ...

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SECTOR ERASE Timing INSTRUCTION = 1101 0111b BLOCK ERASE Timing ...

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PROGRAM/ERASE PERFORMANCE ...

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PACKAGE TYPE INFORMATION 8S 8-Pin JEDEC Small Outline Integrated Circuit (SOIC) Package (measure in millimeters) Top View 4.00 3.80 6.20 5.80 End View 45º 1.27 0.40 Side View 0.51 0.33 5.00 4.80 1.27 BSC 0.25 0.10 1.75 1.35 0.25 0.19 ...

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PACKAGE TYPE INFORMATION (CONTINUED) 8Q 8-Contact Ulta-Thin Small Outline No-Lead (WSON) Package (measure in millimeters) Top View 6. Bottom View 4.00 5. Pin 1 1. 0.48 0.35 0.75 0.50 23 Side ...

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REVISION HISTORY ...

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