MB86605 Fujitsu Microelectronics, Inc., MB86605 Datasheet - Page 27

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MB86605

Manufacturer Part Number
MB86605
Description
CMOS-wide Scsi-ii Protocol Controller With Pci Interface
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
(6) Register read timing for 68 series
Address (A4 to A0) set up time
Address (A4 to A0) hold time
CS0 set up time
CS0 hold time
Data output defined time
Data output disable time
UDS/LDS “L” level pulse width
R/W set up time
R/W hold time
INT signal clear time
A4 to A0
CS0
R/W
UDS/LDS
D15 to 8, UDP
D7 to 0, LDP
INT
INT
*: t
Parameter
DH2
is defined by the rising edge of strobe signal that reads out the step code for the last interrupt source.
t
ARS
t
t
RWS
CRS
t
DH
t
RLD
Symbol
t
t
t
t
t
t
t
t
t
t
t
ARS
ARH
CRS
CRH
RLD
RHD
DS
RWS
RWH
DH
DH2
t
DS
Valid data
Min.
40
20
20
10
70
20
20
5
(n is the division ratio)
t
t
t
RWH
DH2
RHD
Value
t
CRH
t
*
ARH
n
Max.
t
CLF
70
50
MB86605
+ 50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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