CMOS DRAM Samsung Electronics, CMOS DRAM Datasheet - Page 8
CMOS DRAM
Manufacturer Part Number
CMOS DRAM
Description
EDO Mode, x4 and x8 Device Timing Diagram
Manufacturer
Samsung Electronics
Datasheet
1.CMOS_DRAM.pdf
(12 pages)
EDO Mode, x4 and x8 Device Timing Diagram
HYPER PAGE READ AND WRITE MIXED CYCLE
DQ0 ~ DQ3(7)
RAS
CAS
OE
W
A
V
V
I/OH
I/OL
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
-
-
-
-
-
-
-
-
-
-
-
-
t
ASR
t
RAD
ADDR
ROW
t
RAH
t
ASC
ADDRESS
COLUMN
READ(
t
t
RAC
RCS
t
OEA
t
AA
t
t
CAH
CAS
t
t
CAC
CAC
)
t
RCH
VALID
DATA-OUT
ADDRESS
t
COLUMN
ASC
t
t
CP
WEZ
t
t
RCS
t
CPA
WPE
READ(
t
HPC
t
CAH
t
CAS
t
CPA
t
t
RASP
CLZ
t
VALID
DATA-OUT
WEZ
)
t
RCH
t
t
t
WED
CP
ASC
t
WCS
ADDR
COL.
VALID
DATA-IN
t
HPC
t
t
WCH
WRITE
DS
t
t
DH
CAS
t
CAH
t
t
t
ASC
CP
CLZ
ADDR
READ(
COL.
t
t
HPC
RHCP
t
t
t
AA
CAS
t
RAL
CAH
t
AA
)
VALID
DATA-OUT
CMOS DRAM
t
RCH
Don t care
Undefined
t
RP
t
REZ