CMX969D5 MX-COM, Inc., CMX969D5 Datasheet - Page 21

• Manufacturer Part Number: CMX969D5
• Description: MOTIENT/ARDIS RD-LAP MDC4800 Modem
• Manufacturer: MX-COM, Inc.

MOTIENT
4.6.2.5
This task causes the modem to search the received signal for a 24-symbol (RD-LAP) or 40-bit (MDC)
sequence which matches the required Frame Synchronization pattern(s). The allowable errors are described
in Section 4.5.2.6.
In RD-LAP mode when a match is found the modem will read in the following 'S' symbol, then set the BFREE,
IRQ and SRDY bits of the Status Register to '1' and update the SVAL bits. The µC may then write the next
task to the Command Register.
In MDC mode when a match is found the modem will set the BFREE, IRQ bits of the Status Register to ‘1’
and set the FSTYPE bit according to the type of Frame Synchronization pattern received. The µC may then
write the next task to the Command Register.
4.6.2.6
This task causes the modem to read the next 4 symbols and translate them directly (without de-interleaving or
FEC) to an 8-bit byte which is placed into the Data Block Buffer. The BFREE and IRQ bits of the Status
Register will then be set to '1' to indicate that the µC may read the data byte from the Data Block Buffer and
write the next task to the Command Register.
This task is intended for special tests and channel monitoring - perhaps preceded by SFS task.
Note that although it is possible to construct message formats which do not rely on the block formatting of the
THB, TIB and TLB tasks by using T4S or T24S tasks to transmit and R4S to receive the user’s data, anyone
attempting this should be aware that the receive level and timing measurement circuits need to see a
reasonably ‘random’ distribution of all four possible symbols in the received signal to operate correctly, and
should therefore ‘scramble’ the binary data before transmission.
4.6.2.7
This task reads the next 8 received bits and places the resulting 8-bit byte directly (without any attempt to de-
interleave, remove channel status bits or apply FEC) into the Data Block Buffer. The BFREE and IRQ bits of
the Status Register will then be set to '1' to indicate that the µC may read the data byte from the Data Block
Buffer and write the next task to the Command Register.
4.6.2.8
This task causes the modem to read in and decode the following 23 symbols as Station ID data followed by
an 'S' symbol. It is similar to the last two parts of a SFP task except that it will not re-start if the received
CRC0 is incorrect. It would normally follow a SFS task.
The 3 decoded bytes will be placed into the Data Block Buffer, and the CRCERR bit of the Status Register set
to '1' if the received CRC0 was incorrect, otherwise it will be cleared to '0'. The SVAL bits of the Status
Register will be updated and the BFREE, SRDY and IRQ bits set to '1' to indicate that the µC may read the 3
received bytes from the Data Block Buffer and write the next task to the modem's Command Register.
¤ ¤ ¤ ¤ 2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
SM
/ARDIS
SFS: Search for Frame Sync (RD-LAP and MDC)
R4S: Read 4 Symbols (RD-LAP only)
R8B: Read 8 Bits (MDC only)
RSID: Read Station ID (RD-LAP only)
SM
RD-LAP
www.mxcom.com Tel: [phone] 744 5050 Fax: [phone]
TM
MDC4800 Modem
21
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CMX969 Advance Information
Doc. # 20480211.002