IDT82V2048 Integrated Device Technology, Inc., IDT82V2048 Datasheet - Page 12

• Manufacturer Part Number: IDT82V2048
• Manufacturer: Integrated Device Technology, Inc.

IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
FUNCTIONAL DESCRIPTION
OVERVIEW
unit, which contains eight transmit and receive channels for use in either
E1 or T1 applications. The receiver performs clock and data recovery.
As an option, the raw sliced data (no retiming) can be output to the sys-
tem. Transmit equalization is implemented with low-impedance output
drivers that provide shaped waveforms to the transformer, guaranteeing
template conformance. A selectable jitter attenuation may be placed in
the receive path or the transmit path. Moreover, multiple testing func-
tions, such as error detection, loopback and JTAG boundary scan are
also provided. The device is optimized for flexible software control
through a serial or parallel host mode interface. Hardware control is also
available. Figure-1 shows One of the Eight Identical Channels operation.
T1 / E1 MODE SELECTION
Mode, the template selection pins: TS2, TS1 and TS0 determine
whether the operation mode is T1 or E1 (refer to Table-7). In Software
Mode, the Transmit Template Select Register (Primary Register: 11Hex)
determines whether the operation mode is T1 or E1.
SYSTEM INTERFACE
in different modes:
only and without clock recovery).
NOTE:
1. The footprint ‘n’ (n = 0 - 7) indicates one of the eight channels
2. The first letter “e-”indicates expanded register.
3. The grey blocks are bypassed and the dotted blocks are selectable
The IDT82V2048 is a fully integrated octal short-haul line interface
T1/E1 mode selection configures the device globally. In Hardware
The system interface of each channel can be configured to operate
1. Single Rail interface with clock recovery.
2. Dual Rail interface with clock recovery.
3. Dual Rail interface with data recovery (that is, with raw data slicing
RRINGn
RTIPn
TRINGn
TTIPn
Detector
Peak
Driver
Line
Figure - 3. Dual Rail Interface with Clock Recovery
Slicer
CLK&Data
Waveform
Recovery
Detector
Transmit
All Ones
(DPLL)
Shaper
LOS
12
depending on which operation mode the device is in.
RDNn and RCLKn. Data transmitted from TDPn and TDNn appears on
TTIPn and TRINGn at the line interface; data received from the RTIPn
and RRINGn at the line interface are transferred to RDPn and RDNn
while the recovered clock extracting from the received data stream
outputs on RCLKn. In Dual Rail operation, the clock/data recovery mode
is selectable. Dual Rail interface with clock recovery shown in Figure-3
is a default configuration mode. Dual Rail interface with data recovery is
shown in Figure-4. Pin RDPn and RDNn, in this condition, are raw RZ
slice output and internally connected to an EXOR which is fed to the
RCLKn output for external clock recovery applications.
and TRINGn at the line interface. Data received from the RTIPn and
RRINGn at the line interface appears on RDn while the recovered clock
extracting from the received data stream outputs on RCLKn. When the
device is in single rail interface, the selectable AMI or HDB3/B8ZS line
encoder/decoder is available and any code violation in the received data
will be indicated at the CVn pin. The Single Rail Mode can be devided
into 2 sub-modes. Single Rail Mode 1, whose interface is composed of
TDn, TCLKn, RDn, CVn and RCLKn, is realized by pulling pin TDNn to
high for more than 16 consecutive TCLK cycles. Single Rail Mode 2,
whose interface is composed of TDn, TCLKn, RDn, CVn, RCLKn and
BPVIn, is realized by setting bit CRS in e-CRS
The difference between them is that, in the latter mode bipolar violation
can be inserted via pin BPVIn if AMI line code is selected.
Table-1.
Therefore, each signal pin on system side has multiple functions
The Dual Rail interface consists of TDPn
In Single Rail Mode, data transmitted from TDn appears on TTIPn
The configuration of different system interface is summarized in
Attenuator
Attenuator
One of Eight Identical Channels
Jitter
Jitter
3
INDUSTRIAL TEMPERATURE RANGES
HDB3/AMI
HDB3/AMI
Decoder
Encoder
B8ZS/
B8ZS/
1
2
, TDNn, TCLKn, RDPn,
and bit SING in e-SING.
RCLKn
TCLKn
LOSn
RDPn
RDNn
TDPn
TDNn